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Cost-Optimized FPGAs and SoCs

Broad Portfolio of Adaptable Solutions for Cost-Sensitive Applications

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COMING SOON

New cost-optimized, high I/O, low-power FPGA family

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Design Confidently

7 Series Lifecycle Extended Through at Least 2035

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Cost-Optimized Portfolio Overview

Cost Optimized

The balance between feature set and affordability

Power Efficient

The balance between performance and power

Small Form Factor

The balance between physical size and logic resources

ULTRASCALE+ COST-OPTIMIZED PORTFOLIO

Spartan UltraScale+ chip

I/O and Power Optimized

The Spartan™ UltraScale+™ FPGA is the newest member to join the AMD FPGA cost-optimized portfolio. The family delivers high I/O-to-logic ratios, ideal for cost-sensitive, low-power applications. Key applications include industrial, robotics, smart city, computer vision, healthcare, video and broadcast, and more.

Artix UltraScale+ chip

Transceiver and Signal Processing Optimized

The Artix™ UltraScale+™ FPGA offers high data throughput and DSP compute FPGAs, providing up to 192Gb of aggregate bandwidth. Key applications include embedded and video applications, wireless communications, advanced driver assistance systems (ADAS), and industrial IoT.

zynq ultrascale+ soc chip

Embedded Processing Optimized

The Zynq™ UltraScale+™ MPSoC integrates the Arm® processor subsystem and UltraScale+ programmable logic architecture in a single device. Key applications include high-speed networking, high-performance computing, 5G wireless, automotive, avionics, and industrial control systems.

7 SERIES COST-OPTIMIZED PORTFOLIO

spartan 7 fpga chip

Performance per Watt 

The Spartan™ 7 family offers smaller devices with high I/O for design flexibility. The devices are ideal for any-to-any connectivity, protocol conversion, bridging, sensor fusion, and embedded vision applications.

artix 7 chip

Transceiver Bandwidth

The Artix™ 7 family provides up to sixteen 6.6Gb/s transceivers and DDR3 support. It offers the best value for power-sensitive applications, such as software-defined radio and low-end wireless backhaul.

zynq 7000 chip

Processing Capability

The Zynq™ 7000 family pairs single-chip application processors with the FPGA. This reduces die-to-die latency and BOM cost, ideal for high-performance computing, 5G wireless, and industrial control systems.

DESIGN CONFIDENTLY

AMD takes our commitment to long lifecycles very seriously. We are pleased to announce that support is formally being extended for all 7 series devices until at least 2035. This includes all speed and temperature grades for Spartan 7, Artix 7, Kintex™ 7, and Virtex™ 7 FPGAs, as well as Zynq 7000 SoCs.

 

FIND THE RIGHT PRODUCT FAMILY

Solving broad industry-specific problems with performance and flexibility

  Spartan 7 FPGA Artix 7 FPGA Artix UltraScale+ FPGA Zynq 7000 SoC
Z-7007S, Z-7012S, Z-7014S, Z-7010, Z-7015, Z-7020
Zynq UltraScale+ MPSoC
ZU1, ZU2, ZU3, ZU3T
Logic Cells / System Logic Cells (K) 102 215 308 85 157
Total RAM (Mb)* 5.4 16.0 15.2 5.9 21.2
DSP Slices 160 740 1200 220 576
Transceiver Count @ Speed (Gb/s) - 16 @ 6.6 12 @ 16.375 4 @ 6.6 4 @ 6.0 and 8 @ 12.5
DDR Interface @ Speed (Mb/s) DDR3 @ 800 DDR3 @ 1,066 DDR4 @ 2,400 DDR3 @ 1,066 DDR4 @ 2,666
PCI Express® Interface - Gen2x4 Gen4x8 Gen2x4 Gen3x8
I/O Pins 400 500 304 328 252
Processing System
Application Processor Unit - - - Single / Dual-core Arm® Cortex®-A9 Dual / Quad-core Arm Cortex-A53
Real-Time Processor Unit - - - - Dual-core Arm Cortex-R5F
Graphics Processor Unit - - -   Mali™-400MP2
Memory Interfaces - - - DDR3, DDR3L, DDR2, LPDDR2, 2x Quad-SPI, NAND, NOR x16: DDR4 w/o ECC; x32/x64: DDR4, LPDDR4, DDR3, DDR3L, LPDDR3 w/ ECC, 2x Quad-SPI, NAND

* Total RAM= Maximum Distributed RAM + Total Block RAM + UltraRAM

Not sure which family is right for your design? Check out our full Product Selection Guide