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Xilinx Virtex-7 FPGA VC707 Evaluation Kit

Product Description

The Virtex®-7 FPGA VC707 Evaluation Kit is a full-featured, highly-flexible, high-speed serial base platform using the Virtex-7 XC7VX485T-2FFG1761C and includes basic components of hardware, design tools, IP, and pre-verified reference designs for system designs that demand high-performance, serial connectivity and advanced memory interfacing. The included pre-verified reference designs and industry-standard FPGA Mezzanine Connectors (FMC) allow scaling and customization with daughter cards.

Key Features & Benefits

  • 40Gb/s Connectivity platform for high-bandwidth and high-performance applications using Virtex-7 VX485T FPGAs
  • Hardware, design tools, IP, and pre-verified reference designs
  • Advanced memory interface with 1GB DDR3 SODIM Memory up to 800MHz / 1600Mbps
  • Enabling serial connectivity with PCIe Gen2x8, SFP+ and SMA Pairs, UART, IIC
  • Supports embedded processing with MicroBlaze, soft 32bit RISC
  • Develop networking applications with 10-100-1000 Mbps Ethernet (GMII, RGMII and SGMII)
  • Expand I/O with the FPGA Mezzanine Card (FMC) interface

What's Included

  • VC707 evaluation board featuring the Virtex-7 XC7VX485T-2FFG1761C FPGA
  • Full seat Vivado® Design Suite: Design Edition
    • Node locked & Device-locked to the Virtex-7 XC7VX485T FPGA, with 1 year of updates and support
  • Getting Started Guide (Web)
  • Board Design Files (DxDesigner 2005,  Allegro 16.3 – 16.5)
  • AMS 101 evaluation board
  • Cables & Power Supply
  • 90-day limited warranty

Featured Documents

Contact Sales
  • Price: $3,495
  • Part Number: EK-V7-VC707-G
  • Lead Time: 2 Weeks

Key Features

FPGA: Virtex XC7VX485T-2FFG1761C

  • ROHS compliant VC707 kit including the XC7VX485T-2FFG1761 FPGA


  • Onboard JTAG configuration circuitry to enable configuration over USB
  • JTAG header provided for use with Xilinx download cables such as the Platform Cable USB II
  • 128MB (1024Mb) Linear BPI Flash for PCIe® Configuration
  • 16MB (128Mb) Quad SPI Flash


  • 1GB DDR3 SODIMM 800MHz / 1600Mbps
  • 128MB (1024Mb) Linear BPI Flash for PCIe Configuration
  • SD Card Slot

Communication & Networking

  • Gigabit Ethernet GMII, RGMII and SGMII
  • SFP+ transceiver connector
  • GTX port (TX, RX) with four SMA connectors
  • UART To USB Bridge
  • PCI Express x8 gen2 Edge Connector (lay out for Gen3)


  • HDMI Video OUT
  • 2 x16 LCD display
  • 8X LEDs

Expansion Connectors

  • FMC1 – HPC (8 XCVR, 160 single ended or 80 differential (34 LA pairs, 24 HA pairs, 22 HB pairs) user-defined pins)
  • FMC2 – HPC (8 XCVR, 116 single ended or 58 differential (34 LA pairs, 24 HA pairs) user-defined pins)
  • Vadj supports 1.8V
  • IIC



  • Fixed Oscillator with differential 200MHz output
    • Used as the “system” clock for the FPGA
  • Programmable Oscillator with 156.250 MHz as the default output
    • Default frequency targeted for Ethernet applications but oscillator is programmable for many end uses
  • Differential SMA clock input
  • Differential SMA GTX reference clock input
  • Jitter attenuated clock
    • Used to support CPRI/OBSAI applications that perform clock recovery from a user-supplied SFP/SFP+ module

Control & I/O

  • 5X Push Buttons
  • 8X DIP Switches
  • Rotary Encoder Switch (3 I/O)
  • AMS FAN Header (2 I/O)


  • 12V wall adapter or ATX
  • Voltage and Current measurement capability

Debug & Analog Input

  • 8 GPIO Header, 9 pin removable LCD
  • Analog Mixed Signal (AMS) Port

Highlighted Partner Bill of Materials (BOM)

Provider Name Product Category Item Description
SiTime Component Links to power management vendors who supply external power sources surrounding Xilinx devices. Includes tools, product listings and proven hardware.
Xilinx Power Management design examples Power management vendor products and tools Links to power management vendors who supply external power sources surrounding Xilinx devices. Includes tools, product listings and proven hardware.

Key Features

Download the AMS Evaluator and your design files at the Xilinx support site.

  • Analog evaluation card connects to XADC header
  • Evaluates XADC 12-bit, 17-channel, 1Msps dual ADCs and Analog Mixed Signal technology
  • Pins and BNC mini grabbers allow for external analog input signals
  • On-board 16-bit dual DAC for analog test signals
    • Reference designs allow sine wave or DC test signals
  • AMS101 Evaluation card pairs with free AMS Evaluator tool for analyzing analog data, internal temperature and voltage measurements, and saving data to a .csv file

Included in this Kit

Design Tools

Name Description License Type
Vivado Design Suite Design Edition The Xilinx Vivado® Design Suite is a revolutionary IP and System Centric design environment built from the ground up to accelerate the design for all programmable devices. Node locked & Device-locked to the Virtex-7 XC7VX485T FPGA, with 1 year of updates

Intellectual Property

Name Description License Type
Memory Interface Generator (MIG)
MIG is a free software tool used to generate memory controllers and interfaces for Xilinx FPGAs. No-charge IP