Team Design is a flow that allows multiple engineers to work in parallel on the same design during synthesis and implementation. As FPGA devices continue to grow, they usually require a team of developers. Not only are multiple engineers developing HDL but a separate engineer might be an integrator responsible for the synthesis and implementation of the entire design. To make matters more challenging, the team is often an international team with different portions of the design developed in different locations and even by different companies. The Xilinx Team Design flow introduced in ISE®14.1 release focuses on solving these challenging issues.
The Team Design flow utilizes Partitions, an implementation feature that guarantees exact preservation (down to the routing) of previously generated implementation results very similar to the Design Preservation flow. This flow has 3 major steps. These include the initial design setup, team member implementation and assembly of all the team member modules into a final design. The initial design setup provides the framework for all of the team members to be able to implement their portion of the design independently of other team members but in-context with the top level design. At intervals during the design cycle, the entire design can be assembled by using the implementation results of each of the team members.