Vitis AI Engine DSP Design

Designing high-performance DSP functions targeting AMD Versal™ AI Engines can be done using either the AMD Vitis™ development tools or by using the Vitis Model Composer flow—taking advantage of the simulation and graphical capabilities of the MathWorks Simulink® tool. 

In either case, mapping the DSP application into functions to implement in the FPGA or the AI Engines or a combination of FPGA logic and AI Engines is crucial. This requires an understanding of the device capabilities as well as the overall system. 

Typically, compute-intensive functions are better suited to AI Engine implementation, while functions that require data moving/re-ordering are better suited to an FPGA implementation. 

In the example shown below, complex filtering and Fourier transforms are typically better suited within the AI Engine array.

Once functions have been clearly identified as AI Engine appropriate, they can be implemented into the AI Engine using any of the options below.

Note: A hybrid approach using multiple options from the list below is also possible. 

To get started with AI Engines for DSP, it is highly recommended to start with Vitis DSP Library functions (C based) or with Vitis Model Composer (model based). While hand coding can result in a more optimized implementation, using the methods above is the fastest way to get started with AI Engines for DSP while also delivering strong performance.

Different AI Engine functions are then interconnected using graph C code, which is C++ code describing a network of multiple AI Engine tiles.  

Using Vitis Model Composer allows for a graphical interconnection between the different AI Engine functions. This graphical representation can be converted push button into the graph C code by Vitis Model Composer. The robust simulation capabilities of the MathWorks Simulink environment can also be leveraged to verify the design.

To learn more about Versal AI Engine development using Vitis Model Composer, please visit the Versal AI Engine Development using Vitis Model Composer page.

The polyphase channelizer down-converts simultaneously a set of frequency-division multiplexed (FDM) channels carried in a single data stream using an efficient approach based on digital signal processing. Channelizer use is ubiquitous in many wireless communication, radar, aerospace/defense, & medical imaging systems. In this tutorial, we implement two different channelizer designs using a combination of AI Engine and programmable logic (PL) resources in AMD Versal™ Adaptive SoC devices.