Vitis DSP Library contains:
Download Accelerator Binaries onto Platform
Open-source library for DSP applications
Kernels are coded in your familiar C++
Benchmarks and Quality of Results (QoR) are provided
An example design is provided with this library
Combine kernels to construct graphs for complex designs
Vitis AI Engine DSP Library is a configurable library of elements that can be used to develop applications on Versal® AI Engines. This is an open-source library for DSP applications. The user entry point for each library function is an L2 level graph. Each entry point graph will contain one or more L1 level kernels and may contain one or more graph objects. Direct use of L1 level kernels or any other graph class not identified as an entry point is not recommended.
Vitis AI Engine DSP Library consists of the following DSP elements:
Vitis AI Engine DSP Library consists of DSP algorithms optimized to take full advantage of the processing power of Versal devices, which contain an array of AI Engines.
The library is organized into three types of AI Engine designs:
Note: L3 is not yet available
Vitis PL DSP Library implements a discrete Fourier transform using an FFT algorithm for acceleration on AMD Xilinx FPGAs. The library consists of three types of implementations:
These implementations are organized in hardware sub-directories of the corresponding L1, L2, and L3 types.
|L1 PL Primitives||Can be leveraged by developers working on hardware design implementation or designing hardware kernels for acceleration. Particularly suitable for hardware designers.|
|L2 PL Kernels||HLS-based predesigned kernels that can be directly used for FPGA acceleration of different applications on integration with the Xilinx Runtime (XRT).|
|L3 Software APIs||Provided in C, C++, and Python, which allow software developers to offload FFT calculation to FPGAs for acceleration.|
Vitis PL DSP Library provides a fully synthesizable PL-based SSR FFT as well as a 2-dimensional FFT version.
For detailed documentation, please refer to: 1-Dimensional (Line) SSR FFT L1 FPGA Module and 2-Dimensional (Matrix) SSR FFT L1 FPGA Module.
In 2022.2, Vitis DSP Library adds new features for the AI Engine implementation of DSP functions:
Refer to What’s New in the Vitis Software Platform for more details.