UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Reduced Media Independent Interface (RMII)

Product Description

The MII to RMII LogiCORE is a "shim" core which converts a traditional 16-pin Media Independent Interface (MII) on a Xilinx 10/100 Ethernet MAC core to a a 6-pin Reduced Media Independent Interface (RMII) interface, allowing the MAC to connect to RMII compliant PHYs. A fixed 50 MHz reference clock synchronizes the MII_to_RMII with both interfaces.


Key Features and Benefits

  • Option to specify fixed 10 or 100 Mbit per second throughput
  •  Automatic detection of Receive side throughput 
  • Fixed clock frequency of 50 MHz Designed to RMII Consortium specification 
  • Free core provided with the Embedded Development Kit (EDK)

Support

Featured Documents

Default Default Title Document Type Date
Page Bookmarked