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  3. Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit
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Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit

Overview

Product Description

The ZCU102 Evaluation Kit enables designers to jumpstart designs for automotive, industrial, video, and communications applications. This kit features a Zynq® UltraScale+™ MPSoC with a quad-core Arm® Cortex®-A53, dual-core Cortex-R5F real-time processors, and a Mali™-400 MP2 graphics processing unit based on Xilinx's 16nm FinFET+ programmable logic fabric. The ZCU102 supports all major peripherals and interfaces, enabling development for a wide range of applications.

Key Features & Benefits

  • Optimized for quick application prototyping with Zynq UltraScale+ MPSoC
  • DDR4 SODIMM – 4GB 64-bit w/ ECC attached to processing system (PS)
  • DDR4 Component – 512MB 16-bit attached to programmable logic (PL)
  • PCIe® Root Port Gen2 x4, USB3, Display Port, and SATA
  • 4x SFP+ interfaces for Ethernet
  • 2x FPGA Mezzanine Card (FMC) interfaces for I/O expansion, including 16 16.3Gb/s GTH transceivers and 64 user-defined differential I/O signals

Featured Xilinx Devices

Featuring the Zynq UltraScale+ XCZU9EG-2FFVB1156 MPSoC

System Logic Cells (K) 600
Memory (Mb) 32.1
DSP Slices 2,520
Maximum I/0 Pins 328
zynq-ultrascale-plus-bk-chip
Hardware

Board Features

Featuring the ZCU102 Evaluation Board

zcu102calloutupdate

Configuration

  • Onboard JTAG configuration circuitry to enable configuration over USB
  • Dual Quad-SPI flash memory
  • Boot from SD card

Memory

  • PS 4GB DDR4 64-bit SODIMM w/ ECC
  • PL 512MB DDR4 component memory ([256 Mb x 16] devices) at 1200MHz / 2400Mbps DDR
  • 8KB IIC EEPROM
  • Dual 64MB Quad SPI flash
  • SD card slot

Control & I/O

  • 6x Directional Push Buttons (5x PL, 1x PS)
  • DIP switches (8x PL)
  • PMBUS & System Controller MSP430 for power, clocks, and I2C bus switching
  • USB2/3 (MIO ULPI and 1 GTR)**

Expansion Connectors

  • 2x FMC-HPC connectors (16 GTH Transceivers,  64 differential user defined signals)
  • 2x PMOD headers
  • IIC

Communication & Networking

  • RGMII communications at 10, 100, or 1000 Mb/s. Serial GMII interface-supports a 1 Gb/s SGMII interface
  • 4x SFP+ cage
  • SMA GTH support (4x SMA Tx/Rx connectors)
  • UART To USB bridge
  • RJ45 Ethernet connector
  • SATA (1 x GTR)**
  • PCIe Gen2x4 Root Port**

Display

  • HDMI video input and output (3 GTH)
  • External Retimer device driving an HDMI output connector
  • 9x GPIO user LEDs (8x PL, 1x PS)
  • VESA DisplayPort 1.2 source-only controller supports up to two lanes of main link data at rates of 1.62 Gb/s, 2.70 Gb/s, or 5.40 Gb/s.

Clocking

  • Programmable clocks
  • System clocks, user clocks, jitter attenuated clocks
  • 2x SMA MGT input clocks

Power

  • 12V wall adapter or ATX

** Switch enables either PCIe Root Port OR SATA, USB2/3 & DisplayPort

Featured Xilinx Devices

Featuring the Zynq UltraScale+ XCZU9EG-2FFVB1156 MPSoC

System Logic Cells (K) 600
Memory (Mb) 32.1
DSP Slices 2,520
Maximum I/0 Pins 328
zynq-ultrascale-plus-bk-chip

What's Inside

ZCU102 Evaluation Board

Featuring the Zynq UltraScale+ XCZU9EG-2FFVB1156 MPSoC

Access to a full seat of Vivado® Design Suite: Design Edition

Node-locked and device-locked to the XCZU9EG

Ethernet Cable

Targus USB-3

USB3 Adapter

USB Micro Cable

Power Cords and Adapter

Access to SDSoC Environment

To develop full Zynq MPSoC system using C, C++ or OpenCL

Featured Partners

Samtec
Micron
Macim Integrated
Documentation

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Tools & IP

Design Tools & Downloads

Name Description License Type Files
Vivado Design Suite  The Xilinx Vivado® Design Suite is a revolutionary IP and System Centric design environment built from the ground up to accelerate the design for FPGAs and SoCs. Node locked and device-locked to the XCZU9EG MPSoC FPGA, with one year of updates Download Vivado Design Suite
Vitis Unified Software Platform Full suite of tools for embedded software development, hardware acceleration, and debug targeting Xilinx platforms. Free Download Vitis Embedded Platforms
PetaLinux Tools Configure, Build, and Deploy Linux operating system to Xilinx platforms. Free Download Petalinux Tools

Intellectual Property

Name Description License Type
Memory Interface Generator (MIG) MIG is a free software tool used to generate memory controllers and interfaces for Xilinx FPGAs. No-Charge IP

Additional Tools, IP and Resources

Name Product Category Item Description
Open Source Software Tool TeraTerm One of many possible terminal emulators used for serial connection from your PC to the evaluation kit.
Power Advantage Tool Software Tool Power Advantage Tool - Zynq UltraScale+  MPSoC The Power Advantage Tool is a demo designed to showcase the power features of the Zynq UltraScale+ MPSoC.
Deep Learning HDL Toolbox Support Package MathWorks Enables deployment of deep learning processors on Xilinx FPGAs and SOCs using MATLAB
Getting Started Guide for Deep Learning HDL Toolbox Training
 MathWorks Learn how to create, compile, and deploy a dlhdl.workflow object using Deep Learning HDL Toolbox™ Support Package.
Training & Support

Training

Support

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