
The ZCU102 Evaluation Kit enables designers to jumpstart designs for automotive, industrial, video, and communications applications. This kit features a Zynq® UltraScale+™ MPSoC with a quad-core Arm® Cortex®-A53, dual-core Cortex-R5F real-time processors, and a Mali™-400 MP2 graphics processing unit based on Xilinx's 16nm FinFET+ programmable logic fabric. The ZCU102 supports all major peripherals and interfaces, enabling development for a wide range of applications.
Featuring the Zynq UltraScale+ XCZU9EG-2FFVB1156 MPSoC
System Logic Cells (K) | 600 |
---|---|
Memory (Mb) | 32.1 |
DSP Slices | 2,520 |
Maximum I/0 Pins | 328 |
Featuring the ZCU102 Evaluation Board
Configuration
Memory
Control & I/O
Expansion Connectors
Communication & Networking
Display
Clocking
Power
** Switch enables either PCIe Root Port OR SATA, USB2/3 & DisplayPort
Featuring the Zynq UltraScale+ XCZU9EG-2FFVB1156 MPSoC
System Logic Cells (K) | 600 |
---|---|
Memory (Mb) | 32.1 |
DSP Slices | 2,520 |
Maximum I/0 Pins | 328 |
Featuring the Zynq UltraScale+ XCZU9EG-2FFVB1156 MPSoC
Node-locked and device-locked to the XCZU9EG
To develop full Zynq MPSoC system using C, C++ or OpenCL
Name | Description | License Type | Files |
---|---|---|---|
Vivado Design Suite | The Xilinx Vivado® Design Suite is a revolutionary IP and System Centric design environment built from the ground up to accelerate the design for FPGAs and SoCs. | Node locked and device-locked to the XCZU9EG MPSoC FPGA, with one year of updates | Download Vivado Design Suite |
Vitis Unified Software Platform | Full suite of tools for embedded software development, hardware acceleration, and debug targeting Xilinx platforms. | Free | Download Vitis Embedded Platforms |
PetaLinux Tools | Configure, Build, and Deploy Linux operating system to Xilinx platforms. | Free | Download Petalinux Tools |
Name | Description | License Type |
---|---|---|
Memory Interface Generator (MIG) | MIG is a free software tool used to generate memory controllers and interfaces for Xilinx FPGAs. | No-Charge IP |
Name | Product Category | Item | Description |
---|---|---|---|
Open Source | Software Tool | TeraTerm | One of many possible terminal emulators used for serial connection from your PC to the evaluation kit. |
Power Advantage Tool | Software Tool | Power Advantage Tool - Zynq UltraScale+ MPSoC | The Power Advantage Tool is a demo designed to showcase the power features of the Zynq UltraScale+ MPSoC. |
Deep Learning HDL Toolbox | Support Package | MathWorks | Enables deployment of deep learning processors on Xilinx FPGAs and SOCs using MATLAB |
Getting Started Guide for Deep Learning HDL Toolbox | Training |
MathWorks | Learn how to create, compile, and deploy a dlhdl.workflow object using Deep Learning HDL Toolbox™ Support Package. |