Enabling All Developers from Edge to Cloud
Vitis™ Unified Software Platform Overview
The Vitis unified software platform includes:
- Comprehensive core development kit to seamlessly build accelerated applications
- Rich set of hardware-accelerated open-source libraries optimized for Xilinx FPGA and Versal ACAP hardware platforms
- Plug-in domain-specific development environments enabling development directly in familiar, higher-level frameworks
- Growing ecosystem of hardware-accelerated partner libraries and pre-built applications
- Vitis Model Composer, a Model-Based Design tool that enables rapid design exploration and verification within the MathWorks MATLAB® and Simulink® environment and accelerates the path to production on Xilinx devices.
- Vitis Networking P4 allows for the creation of soft-defined networks. VitisNetP4 data plane builder generates systems that can be programmed for a wide range of packet processing functions from simple packet classification to complex packet editing.
Platform-Based Flow
The Vitis development enables portability from platform to platform whether you are porting from PoC, development board, or custom board.
Vitis Platform-Based design methodology provides many productivity advantages.
- Platform Reuse: Swap different acceleration applications with the same platform.
- Application Portable: Port applications across different platforms with minimum efforts
- Simulation Time: Speed up co-simulation with Kernels
- Run Time: Open source runtime that takes care of host-device communication through PCIe or embedded for you
- System debug: Save the full hardware compile by co-simulating the full system
Key Components of the Vitis Unified Software Platform
Vitis AI Development Environment
The Vitis AI development environment is a specialized development environment for accelerating AI inference on Xilinx embedded platforms, Alveo accelerator cards, or on the FPGA-instances in the cloud. Vitis AI development environment supports the industry’s leading deep learning frameworks like Tensorflow and Caffe, and offers comprehensive APIs to prune, quantize, optimize, and compile your trained networks to achieve the highest AI inference performance for your deployed application.
Vitis Accelerated Libraries
Open-source, performance-optimized libraries that offer out-of-the-box acceleration with minimal to zero-code changes to your existing applications, written in C, C++ or Python. Leverage the domain-specific accelerated libraries as-is, modify to suit your requirements or use as algorithmic building blocks in your custom accelerators.
Vitis Core Development Kit
Complete set of graphical and command-line developer tools that include the Vitis compilers, analyzers and debuggers to build, analyze performance bottlenecks and debug accelerated algorithms, developed in C, C++ or OpenCL. Leverage these features within your own IDEs or use the standalone Vitis IDE.
Xilinx Runtime library
Xilinx Runtime library (XRT) facilitates communication between your application code (running on an embedded ARM or x86 Host) and the accelerators deployed on the reconfigurable portion of PCIe based Xilinx accelerator cards, MPSoC based embedded platforms or ACAPs. It includes user-space libraries and APIs, kernel drivers, board utilities, and firmware.
Vitis Target Platforms
The Vitis target platform defines base hardware and software architecture and application context for Xilinx platforms, including external memory interfaces, custom input/output interfaces and software runtime.
- For Xilinx accelerator cards on-premise or in the cloud, the Vitis target platform automatically configures the PCIe interfaces that connect and manage communication between your FPGA accelerators and x86 Application code – you don’t need to implement any connection details!
- For Xilinx embedded devices, the Vitis target platform also includes the operating system for the processor on the platform, boot loader and drivers for platform peripherals, and root file system. You can use predefined Vitis target platforms for Xilinx evaluation boards or define your own in Vivado® Design Suite.
The Vitis Model Composer is a Xilinx toolbox for MATLAB® and Simulink® enabling rapid design exploration and verification within the MATLAB® and Simulink® environment and accelerates the path to production on Xilinx devices.
- Create a design using optimized blocks targeting AI Engines and Programmable Logic. Visualize and analyze simulation results and compare the output to golden references generated using MATLAB® and Simulink®.
- Seamlessly co-simulation AI Engine and Programmable Logic (HLS, HDL) blocks.
- Automatically generate code (AI Engines dataflow graph, RTL, HLS C++) and test bench for a design.
Using Vitis™ Software for Application Acceleration Development Flows
Design accelerators for your data and compute-intensive applications at the edge, on-premise or in the cloud:
- Identify the performance-critical portions of your application that demands acceleration.
- Design Accelerators using Vitis Accelerated libraries or develop your own in C,C++, OpenCL or RTL.
- Build, Analyze and Debug to verify functional correctness and validate performance goals are met.
- Deploy Accelerated Application on Xilinx Platforms at edge, on-premise or cloud.
Acceleration Kernels
Vitis supports hardware acceleration kernels with PS or x86 to control kernels. The Vitis application acceleration development flow provides a framework for developing and delivering FPGA-accelerated applications using standard programming languages for both software and hardware components. For kernel creation, users can choose from the following:
- Writing traditional RTL for PL kernel
- C/C++ coding with Vitis HLS for PL kernel
- Vitis model composer for PL and/or AI Engine
- And C/C++ coding with AI Engine compiler for AI Engine
Vitis also supports hardware acceleration kernels without PS, or x86 to control for free-running. Free-running kernels have no control signal ports, and cannot be started or stopped. The "no-control signal" feature of the free-running kernel results in the following characteristics:
- The free-running kernel has no memory input or output port, therefore it interacts with the host or other kernels (other kernels can be regular kernel or another free-running kernel) only through streams.
- When the FPGA is programmed by the binary container (xclbin), the free-running kernel starts running on the FPGA, and therefore it does not need the clEnqueueTask command from the host code.
- The kernel works on the stream data as soon as it starts receiving from the host or other kernels, and it stalls when the data is not available.
Using Vitis Software for Embedded Software Development Flows
Vitis core development kit includes comprehensive developer tools to design, debug, and deploy software applications targeted towards embedded processors on Xilinx Zynq, MPSoC, RFSoC, and ACAP devices. Vitis embedded software development features include:
- Importing target platform definition created using Vivado® Design Suite
- Application development for single, multi-processor and heterogenous processor systems
- Ability to create and configure board support packages (BSPs) for third-party OS
- Board bring-up and Firmware development
- System-level performance analysis and benchmarking
- Real-time debug and trace of heterogeneous embedded systems
Learn More about the Xilinx Embedded Software Infrastructure.
Edge Deployment
As the data being produced continues to explode, there's a growing need to be able to bring computing power closer to the source of the data to meet the response-time, power-consumption and cost goals of performance-critical applications like IIoT, Automated Driving, Medical Imaging, Surveillance among others.
Xilinx embedded platforms are enabling applications where differentiation is key, power efficiency is critical, systems must be extremely responsive, and the latest algorithms and sensors need to be quickly deployed.
On-Premise Deployment
Xilinx® Alveo™ Data Center accelerator cards are designed to meet the constantly changing needs of the modern Data Center, providing up to 90X performance increase over CPUs for common workloads, including machine learning inference, quantitative finance, video transcoding, and database search and analytics.
Vitis™ software development platform enables application, software, and hardware developers alike to leverage the power of Alveo accelerator cards to meet the demanding compute, network, and storage requirements of their applications.
Cloud Deployment
Xilinx Platforms are designed to meet the constantly changing needs of modern data center workloads like Deep Learning, Video Transcoding, Big Data Analytics, Genomics, Compression, Network Security & Search that require high bandwidth, enhanced networking, and very high compute capabilities over CPU and GPU alternatives, while lowering the total cost of ownership.
Xilinx FPGAs are now broadly accessible to all developers everywhere through public cloud service providers like Amazon AWS and Nimbix. Using Vitis, you can leverage the power of Xilinx FPGAs in the cloud, while continuing to develop in familiar programming languages like C and C++. You can also publish your FPGA-accelerated applications on the broader cloud marketplace and monetize your solutions.
Vitis Unified Software Platform Documentation
The Vitis™ unified software platform documentation provides support for using Vitis for each of the two software development flows: Application acceleration development and Embedded software development.
Develop Accelerated Applications
6 steps to setup and accelerate your application using Vitis™ Unified Software Platform:
Download Software and Access Documentation and Training
Develop Using Vitis in the Cloud
Develop accelerated applications with the Vitis Unified Software Platform in the Cloud – No local software installations or upfront purchase of hardware platforms necessary (pay-as-you-go). Log in and get started right away.
Access Vitis Tools using the FPGA Developer AMI, on AWS Marketplace. This AMI (Amazon Machine Instance) includes everything you need to develop, simulate, debug, and compile your accelerated algorithms on F1 instances – no local software setups required.
Vitis Target Platforms
Note: Alveo Target Platforms for 2020.1 are compatible with Vitis tools 2020.2
For instructions on how to create custom embedded target platforms for Vitis, see Vitis Embedded Software Development User Guide – UG1400
Video Tutorials
Webinars
High-Performance Embedded Vivdeo Analytics with Vitis
Learn how to build and run a video analytics example application using both VCU, DPU, and PL on a ZCU104 evaluation board.
Getting Started with the Ultra96-V2 Development Board
Learn how to get started on the Ultra96-V2 Development Board with Vitis.
Design Methodology
In this webinar, we will introduce developers to the methodology for architecting accelerated applications and discuss the best practices for developing high-performance kernels using C/C++.
Use Vitis Libraries to Accelerate Workloads with Alveo U50
In this webinar, users will learn how to build and run an acceleration example application using Vitis libraries.
Bring Applications to Life with Vitis
In this webinar, learn about the Vitis environment and how it enables the development of embedded software and accelerated applications on Xilinx platforms.
Introducing Vitis Unified Software Platform
How can your hardware keep up with ever increasing demand? Hardware acceleration with the power of Vitis, our new Unified Software Platform.
Develop with Vitis Accelerated Libraries
In this Webinar, learn about different levels of abstraction, see a demo walk-through of getting started using the Vitis libraries and glimpse the performance benefits you can achieve.