• Comprehensive core development kit to seamlessly build accelerated applications
• Rich set of hardware-accelerated open-source libraries optimized for Xilinx FPGA and Versal ACAP hardware platforms
• Plug-in domain-specific development environments enabling development directly in familiar, higher-level frameworks
• A Growing ecosystem of hardware-accelerated partner libraries and pre-built applications
• Vitis Model Composer, a Model-Based Design tool that enables rapid design exploration and verification within the MathWorks MATALB® and Simulink® environment and accelerates the path to production on Xilinx devices. The tool enables co-simulation of blocks targeting AI Engines and Programmable Logic, code generation, and automatic test bench creation.
• Vitis Networking P4 allows for the creation of soft-defined networks. VitisNetP4 data plane builder generates systems that can be programmed for a wide range of packet processing functions from simple packet classification to complex packet editing.

The Vitis AI development environment is a specialized development environment for accelerating AI inference on Xilinx embedded platforms, Alveo accelerator cards, or on the FPGA-instances in the cloud. Vitis AI development environment supports the industry’s leading deep learning frameworks like Tensorflow and Caffe, and offers comprehensive APIs to prune, quantize, optimize, and compile your trained networks to achieve the highest AI inference performance for your deployed application. 

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Open-source, performance-optimized libraries that offer out-of-the-box acceleration with minimal to zero-code changes to your existing applications, written in C, C++ or Python. Leverage the domain-specific accelerated libraries as-is, modify to suit your requirements or use as algorithmic building blocks in your custom accelerators.

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Complete set of graphical and command-line developer tools that include the Vitis compilers, analyzers and debuggers to build, analyze performance bottlenecks and debug accelerated algorithms, developed in C, C++ or OpenCL. Leverage these features within your own IDEs or use the standalone Vitis IDE.

Xilinx Runtime library (XRT) facilitates communication between your application code (running on an embedded ARM or x86 Host) and the accelerators deployed on the reconfigurable portion of PCIe based Xilinx accelerator cards, MPSoC based embedded platforms or ACAPs. It includes user-space libraries and APIs, kernel drivers, board utilities, and firmware. 

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The Vitis target platform defines base hardware and software architecture and application context for Xilinx platforms, including external memory interfaces, custom input/output interfaces and software runtime.

• For Xilinx accelerator cards on-premise or in the cloud, the Vitis target platform automatically configures the PCIe interfaces that connect and manage communication between your FPGA accelerators and x86 Application code – you don’t need to implement any connection details!

• For Xilinx embedded devices, the Vitis target platform also includes the operating system for the processor on the platform, boot loader and drivers for platform peripherals, and root file system. You can use predefined Vitis target platforms for Xilinx evaluation boards or define your own in Vivado® Design Suite.

The Vitis Model Composer is a Xilinx toolbox for MATLAB® and Simulink® enabling rapid design exploration and verification within the MATALB® and Simulink® environment and accelerates the path to production on Xilinx devices.

• Create a design using optimized blocks targeting AI Engines and Programmable Logic. Visualize and analyze simulation results and compare the output to golden references generated using MALTAB® and Simulink®.
• Seamlessly co-simulation AI Engine and Programmable Logic (HLS, HDL) blocks. 
• Automatically generate code (AI Engines dataflow graph, RTL, HLS C++) and test bench for a design.