CAN with Flexible Data Rate (CAN FD) IP Core Evaluation

AMD supports Full System Hardware Evaluation. The evaluation license key for this core will enable you to parameterize, generate and instantiate this IP in your design. It will also allow you to perform functional and timing simulation, generate a bitstream, and download and configure your design in hardware. The resulting IP will be fully functional in the FPGA for certain period of time, after which it will cease to function. To restore the evaluation core's operation in your design, simply reconfigure the FPGA with the bitstream.

Requirements

Please refer to the Requirements link on the product page for this core for details on System Requirements for the Vivado™ and EDK™ configurations of this core.

License Terms

Please note that the terms of the CAN LogiCORE IP Evaluation License Agreement apply toward your evaluation of this core.

 

Accessing Evaluation Files

Simulation Only Evaluation

  • Make sure you have satisfied the Software Requirements for this core.
  • Follow the Installation Instructions in the Master Installation and Licensing Guide - Vivado to install the required Vivado software and IP Update.
  • Follow the general instructions to access and evaluate the core.

Full System Hardware Evaluation

The procedures are the same as for the Simulation Only Evaluation, except that for the IP Catalog configuration of the core, you must additionally request and install a Full System Hardware Evaluation license key. This will allow you to generate a bitstream that you can use to program an AMD FPGA and evaluate the core in hardware for a limited amount of time.

  1. Make sure you have satisfied the Software Requirements for this core.
  2. If you are evaluating the XPS CAN or AXI CAN Cores, go directly to the General Instructions for EDK/XPS core.
  3. For the IP Catalog configuration of the core, follow the Installation Instructions in the Installation and Licensing Guide - Vivado to install the required Vivado software and IP Update.

    Contact your local FAE to submit a request to evaluate this core. If you do not already have a local AMD FAE, your local Sales Office can assign one to you. When your evaluation request is approved, follow the instructions from AMD Customer Service to generate a Full System Hardware Evaluation License key. Generate and install the key as directed by the instructions in the email you will receive.
  4. Follow the general instructions below to load the IP Catalog customization GUI for this core and generate the core.
  5. For some cores, an Example Design is written to your project directory by the IP Catalog when you generate the core. If an example design is provided, instructions will be documented in a Product Guide document.
  6. To perform an in-depth evaluation in hardware in your own design:
    • Instantiate the core in your own design, place and route the design using Vivado, then generate a bitstream and use it to program an appropriate FPGA device.

General Instructions for XPS/EDK core

IP Evaluation license keys in EDK are pre-programmed with a 14-month evaluation period which starts from the official release date of your particular version of EDK. You can generate EDK systems containing these Full System Hardware Evaluation cores throughout the 14-month evaluation period. When programmed into an FPGA, the evaluation cores will operate for certain period of time when running at the nominal clock frequency specified for the core.

To evaluate this core in EDK, simply:

 

  1. Make sure you have installed the latest version of EDK
  2. Download and install the latest EDK Service Pack from the Xilinx Download Center. Specify "EDK Service Pack" for the Download Type.
  3. Contact your local AMD FAE to submit a request to evaluate this core. If you do not already have a local FAE, your local Sales Office can assign one to you. When your evaluation request is approved, follow the instructions from Xilinx Customer Service to generate a Full System Hardware Evaluation License key. Generate and install the key as directed by the instructions in the email you will receive.
  4. Refer to the EDK Getting Started Guide for general instructions on how to add the core into your EDK system and evaluate it.

After you purchase a license for the core, you will be able to generate a "Full" electronic license key for the latest released core version. Since the Full license key does not expire, installing it will enable you to generate new EDK systems containing the core version in question indefinitely. Systems containing the core generated with a Full license will not time out when programmed into an FPGA.

General Instructions

You can customize the IP for use in your design by specifying values for the various parameters associated with the IP core using the following steps: