Xilinx is now part ofAMDUpdated Privacy Policy
  2. Boards
  3. VCK5000 Versal Development Card for AI Engine
Click to Enlarge

VCK5000 Versal Development Card for AI Engine

by: Xilinx, Inc

The Xilinx VCK5000 Versal development card is built on the Xilinx 7nm Versal® ACAP architecture and is designed for adaptable intelligent (AI) engine development with Vitis end-to-end flow.

  • Price: $2,745.00
  • Part Number: VCK5000-AIE-ADK-P-G-ED
  • Device Support:
    • Versal AI Core Series
Buy

Overview

Product Description

The Xilinx® VCK5000 Versal® development card is built on the Xilinx 7nm Versal ACAP architecture and is designed for 5G, DC compute, AI, Signal Processing, Radar, and others. The Domain-Specific Architecture brings strong horsepower while keeping ease-of-use in mind with C/C++,  software programmability. Bring your algorithms and applications faster with AI engine C/C++ high level abstraction APIs and Vitis Accelerated Libraries.

The Vitis end-to-end flow is developed using C/C++ to run on X86 or embedded processors and manage runtime interactions with the accelerator with XRT. The hardware component, or kernel, can be developed using C/C++, or RTL target on PL or AI Engines. 

Key Features & Benefits

Performance icon

Performance and Power 

  • Up to 10x performance improvements compared to previous generation Xilinx UltraScale+™ with less power in diverse applications
  • Industry-leading compute power: up 145 TOPS (int8); 37 TOPS (int16); 12T FLOPs (fp32)
Performance icon

Software Familiarity 

reconfigurable-icon

Mixed Kernel Development

  • Customize your own data pipeline with mixed kernels
  • Develop AIE kernels in C/C++, PL kernels in RTL or HLS, and let Vitis stitch together the full system
Click to Enlarge
vitis-accelerated-libraries

Click to Enlarge

vck5000-architecture

Click to Enlarge

Product Information

Board Features

Card Specifications VCK5000
Device VC1902
Compute Active Passive*
INT8 TOPs (peak) 145 145
INT8x16 TOPs (peak) 70 70
INT16 TOPs (peak) 37 37
CINT16 TOPs (peak) 10 10
FP32 TOPs (peak) 12 12
Dimensions
Height Full Full
Length Full 3/4
Width Dual Slot Dual Slot
Memory
Off-chip Memory Capacity 16 GB 16 GB
Off-chip Total Bandwidth 102.4 GB/s 102.4 GB/s
Internal SRAM Capacity 23.9 MB 23.9 MB
Internal SRAM Total Bandwidth 23.5 TB/s 23.5 TB/s
Interfaces
PCI Express Gen3 x 16 / Gen4 x 8 Gen3 x 16 / Gen4 x 8
Network Interfaces 2x QSFP28 (100GbE) 2x QSFP28 (100GbE)
Logic Resources
Look-up Tables (LUTs) 899,840 899,840
Power and Thermal
Maximum Total Power 225W 225W
Thermal Cooling Active Passive

* We will ship the active cooling board only. If you remove the fans from the VCK5000 board, following the hardware installation guide in the VCK5000 Versal Development Card Secure Site, it becomes Passive.

Resources

Getting Started

Follow the steps below to get started with the VCK5000 card

Step 1: Purchase

Purchase VCK5000 production silicon-based card 

Purchase > 

Step 2: Access Secure Site 

Request access to the VCK5000 Versal Development Card Secure Site

Step 3: Get Started 

Follow the getting started steps and installation guide in the VCK5000 Versal Development Card Secure Site

Documentation
Default Default Title Document Type Date
Articles
cuda-vitis
Article

Vitis AIE API on VCK5000

This article introduces developing AI Engine Kernels with Vitis 2021.2 AI Engine high-level abstraction API, improving your design productivity significantly! The AI Engine API is a higher-level abstraction C++ API implemented as a C++ header-only library that provides types and operations that get transparently translated into efficient optimized low-level AI Engine intrinsics. It improves portability across different AI Engine architectures, AI Engine API is the lead method of AI Engine kernel programming.

Read Now  >
exploring-support-vector-machine-acceleration-with-vitis
Article

Migrating from Cuda to Vitis

Familiar with CUDA and Nvidia GPUs? Then this article is for you!  You will learn how to approach the development of parallel hardware with Xilinx Vitis seen through the prism of CUDA.

Read Now  >
kernel-code
Article

Kernel Code Optimizations for Versal ACAP with Vitis

Vitis is a unified software platform to develop embedded software and accelerated applications onto heterogeneous Xilinx platforms including FPGAs (Field Programmable Gate Array), SoCs (System on Chip), and Versal ACAPs. In this article, we briefly describe Vitis and then provide an overview of the key kernel optimizations to get the most of the silicon.

Read Now  >
image-1-vitis-code
Article

Why Choose Xilinx to Accelerate Your Applications in Diverse Industry?

Vitis provides plenty of development kits and libraries to accelerate applications in many industries easier than traditional FPGA flow. Meanwhile, it is also very friendly to those developers who have a good software development experience based on CPU or GPU, using C/C++ and Python. Many CUDA-like libraries have been covered in Vitis libraries allowing developers to migrate their designs efficiently.

So, let's dive in why you choose Xilinx to accelerate your applications!

Read Now  >