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Zynq UltraScale+ RFSoC ZCU111 Evaluation Kit

Product Description

The Zynq® UltraScale+™ RFSoC ZCU111 Evaluation Kit enables designers to jumpstart RF-Class analog designs for wireless, cable access, early-warning(EW)/radar and other high-performance RF applications.  This kit features a Zynq Ultrascale+ RFSoC  supporting 8x 4GSPS 12-bit ADCs, 8x 6.5GSPS 14-bit DAC, and 8 soft-decision forward error correction (SD-FECs).   Complete with ARM Cortex A53 and ARM Cortex-R5 subsystems, UltraScale+ programmable logic, and the highest signal processing bandwith in a Zynq UltraScale+ device, this kit provides a rapid, comprehensive RF Analog-to-Digital signal chain protoyping platform.


Key Features & Benefits

  • Zynq UltraScale+ RFSoC ZCU111 Evaluation Board with XCZU28DR-2FFVG1517E RFSoC
  • DDR4 Component – 4GB, 64-bit, 2666 MT/s, attached to Programmable Logic (PL)
  • DDR4 SODIMM – 4GB 64-bit, 2400 MT/s, attached to Processor Subsystem (PS)
  • Ganged SFP28 cage to support up to 4 SFP/SFP+/zSFP+/SFP28 modules
  • USB3, DisplayPort, and SATA
  • FPGA Mezzanine Card (FMC+) interface for I/O expansion including 12 x 32.75 Gb/s GTY transceivers and 34 user defined differential I/O signals
  • XM500 RFMC balun transformer add-on card with 4 DACs/ 4 ADCs to baluns 4 DACs/ 4 ADCs to SMAs

Featured Xilinx Devices

Featuring the Zync UltraScale+ XCZU28DR-2FFVG1517E RFSoC

System Logic Cells (K) 930
Memory (Mb) 60.5
DSP Slices 4,272
33G Transceivers 16
Maximum I/O Pins 371
zynq-ultrascale-plus-bk-chip

Board Features

Featuring the Zync UltraScale+ XCZU28DR-2FFVG1517E RFSoC

zcu111-callout_update

Configuration

  • Onboard JTAG configuration circuitry to enable configuration over USB
  • JTAG header provided for use with Xilinx download cables such as the Platform Cable USB 3/2
  • Dual Quad-SPI flash memory
  • Boot from micro-SD card

Memory

  • PS 4GB DDR4 64-bit SODIMM at 2400 MT/s
  • PL 4GB DDR4 64-bit Component (four 512 Mb x 16) at 2666 MT/s
  • Dual 2Gb Quad SPI flash
  • SD Card Slot

Communication & Networking

  • RGMII communications at 10, 100, or 1000 Mb/s
  • 4x SFP28 (SFP, SFP+, zSFP, zSFP+) cage
  • UART To USB Bridge
  • RJ45 Ethernet connector
  • SATA (1 x GTR)

Display

  • VESA DisplayPort 1.2 source-only controller supports up to two lanes of main link data at rates of 1.62 Gb/s, 2.70 Gb/s, or 5.40 Gb/s
  • 8x  GPIO user LEDs

Expansion Connectors

  • FMC-HPC (Partial Population) connector (12 GTY Transceivers, 68 single-ended or 34 differential user defined signals)
  • 2x PMOD headers
  • RFMC DAC/ADC plug-in card interface

Clocking

  • Programmable clocks
  • System clocks, user clocks, RF data converter clocks
  • SMA MGT input clock

Control & I/O

  • 5X directional push buttons
  • 8X DIP switches
  • PMBUS & system controller
  • USB2/3 (1 GTR)

Power

  • 12V wall adapter or ATX

Featured Xilinx Devices

Featuring the Zync UltraScale+ XCZU28DR-2FFVG1517E RFSoC

System Logic Cells (K) 930
Memory (Mb) 60.5
DSP Slices 4,272
33G Transceivers 16
Maximum I/O Pins 371
zynq-ultrascale-plus-bk-chip

What's Inside

ZCU111 Evaluation Board

XM500 RFMC Balun Add-on Card

Power Cords and Adapters

6 SMA Cables

6 Filters

Two 2500 MHz low pass, two 1300 MHz low pass, two 3000-4300 MHz bandpass

Access to a full seat of Vivado® Design Suite: System Edition

Node-locked and device-locked to the XCZU28DR RFSoC

Ethernet Cable

USB Micro Cable

SD-Card

Filter Documentation

Step 1: Board Revision

Step 2: Tools Version

Step 3: Show Documentation

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Design Tools

Name Description License Type
Vivado Design Suite: System Edition The Xilinx Vivado® Design Suite is a revolutionary IP and System Centric design environment built from the ground up to accelerate the design for all programmable devices. Node-locked and device-locked to the XCZU28DR RFSoC with one year of updates
Xilinx SDK Full suite of tools for embedded software development and debug targeting Xilinx platforms. Free
PetaLinux Tools Configure, Build and Deploy Linux operating system to Xilinx platforms. Free

Intellectual Property

Name Description License Type
Memory Interface Generator (MIG) MIG is a free software tool used to generate memory controllers and interfaces for Xilinx FPGAs. No-Charge IP

Additional Tools, IP and Resources

Name Product Category Item Description
Vivado Board Support (VBS) files
Board Support File Zip Files required to make the zcu111 board selectable in Vivado 2018.2
Red Hat Operating System Fedora Fedora-20 is used for UltraScale TRDs
Open Source Software Tool TeraTerm One of many possible terminal emulators used for serial connection from your PC to the evaluation kit.
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