Zynq UltraScale+ RFSoC
The Industry’s Only
Single-Chip Adaptable Radio Platform
Integration of RF Analog
The monolithic integration of direct RF-sampling data converters onto an adaptive SoC eliminates the need for external data converters, enabling a flexible solution with up to 50% reduced power and footprint over a multi-component solution–including the elimination of the power-hungry FPGA-to-Analog interfaces like JESD204. This approach also enables a highly flexible solution, moving much of the RF signal processing into the digital domain.
SD-FEC
Zynq® UltraScale+™ RFSoC integrates a soft-decision forward error-correction cores (SD-FEC) IP block with low-density parity checking (LDPC) and turbo codec support. The hardened cores delivers over 1Gb/s of performance at low latency, as well as lower power and smaller area than soft logic implementations.
Hardened Digital Front-End
Zynq RFSoC DFE is the latest adaptive RFSoC platform that integrates more hardened IP than soft logic for critical DFE processing. Enabling a flexible solution for 5G New Radio, Zynq RFSoC DFE operates up to 7.125GHz of input/output frequency with power-efficiency and cost-effectiveness.
Hardware Adaptability
The Zynq UltraScale+ RFSoC architecture integrates FPGA fabric for flexibility to meet a wide range of requirements with the same foundational hardware. The ability to leverage the same platform to address diverse requirements and emerging standards allows vendors to react quickly to new market opportunities.
Complete SoC for Single-Chip Radio
As a heterogeneous compute architecture that includes a full Arm processing subsystem, FPGA fabric, and complete analog/digital programmability across the RF signal chain, Zynq UltraScale+ RFSoCs provides a complete, single chip software-defined radio platform for diverse applications, and the ability to produce radio variants as market dynamics evolve.
Zynq UltraScale+ RFSoC Portfolio
Scalability across the portfolio that meets current and future market needs
Up to 4GHz
Frequency Operation
Up to 5GHz
Frequency Operation
Up to 6GHz
Frequency Operation
Up to 7.125GHz
Frequency Operation
5G and LTE Wireless
With Zynq® RFSoC, wireless infrastructure manufacturers can achieve previously unattainable footprint and power reduction, critical to Massive MIMO deployment.
- Up to 7.125GHz input/output frequency operation on a single device
- Device variants with integrated LDPC SD-FEC cores and high DSP density for 5G baseband
- Optimal millimeter wave IF implementations including fixed wireless access and mobile backhaul
- Hardened radio digital front-end for up to 400MHz bandwidth (8T8R) for 5G New Radio (Zynq RFSoC DFE Only)
Remote-PHY for Cable Access DOCSIS 3.1
Zynq UltraScale+™ RFSoC enables cable access multi-service operators (MSOs) to move PHY layer processing closer to home with remote PHY nodes, increasing network capacity.
- RF-Analog for stringent power & form factor constraints
- LDPC to meet DOCSIS 3.1 requirements
- Extended spectrum support for DOCSIS 4.0
- FPGA logic for future-proofing and full duplex IP
Phased Array Radar/Digital Array RADAR
As a single-chip TRX solution for scalable, multi-function, phased array radar, the Zynq UltraScale+ RFSoC enables low latency transmit and receive for optimal response time in early warning scenarios.
- Full L-Band Sampling
- Partial S-Band Direct Sampling, full S-Band at 2nd Nyquist
- Partial C-Band Direct Sampling
- Software and hardware reconfigurable
Test & Measurement
Designers can build high-speed multi-function instruments for signal generation and signal analysis by using direct RF-sampling, highly flexible, reconfigurable logic, and software programmability in Zynq UltraScale+ RFSoC.
Satellite Communications
Designers can build high-speed multi-function instruments for signal generation and signal analysis by using direct RF-sampling, highly flexible, reconfigurable logic, and software programmability in Zynq UltraScale+ RFSoC.
Zynq® UltraScale+™ RFSoC Gen 1
Direct-RF Signal Chain Features
| ZU21DR | ZU25DR | ZU27DR | ZU28DR | ZU29DR | ||
|---|---|---|---|---|---|---|
| Max. RF input Frequency (GHz) | 4 | |||||
| Decimation / Interpolation | 1x, 2x, 4x, 8x | |||||
| 12-bit RF-ADC | # of ADCs | - | 8 | 8 | 8 | 16 |
| Max Rate (GSPS) | - | 4.096 | 4.096 | 4.096 | 2.058 | |
| 14-bit RF-DAC | # of DACs | - | 8 | 8 | 8 | 16 |
| Max Rate (GSPS) | - | 6.554 | 6.554 | 6.554 | 6.554 | |
| SD-FEC | 8 | 0 | 0 | 8 | 0 | |
Programmable Logic
| ZU21DR | ZU25DR | ZU27DR | ZU28DR | ZU29DR | |
|---|---|---|---|---|---|
| System Logic Cells (K) | 930 | 678 | 930 | 930 | 930 |
| DSP Slices | 4,272 | 3,145 | 4,272 | 4,272 | 4,272 |
| Memory (Mb) | 60.5 | 41.3 | 60.5 | 60.5 | 60.5 |
| GTY Transceivers | 16 | 8 | 16 | 16 | 16 |
| PCIe Gen 3x16 | 2 | 1 | 2 | 2 | 2 |
| PCIe Gen3 x16 / Gen4 x8 / CCIX | - | - | - | - | - |
| 100G Ethernet MAC/PCS with RS-FEC | 2 | 1 | 2 | 2 | 2 |
| Maximum I/O Pins | 280 | 347 | 347 | 347 | 408 |
Processing System Features
| ZU21DR | ZU25DR | ZU27DR | ZU28DR | ZU29DR | |
|---|---|---|---|---|---|
| Application Processing Unit | Quad-core Arm® Cortex®-A53 MPCore up to 1.33GHz | ||||
| Real-Time Processing Unit | Dual-core Arm Cortex-R5 MPCore up to 533MHz | ||||
| Embedded and External Memory | 256KB On-Chip Memory w/ECC; External DDR4; DDR3; DDR3L; LPDDR4; LPDDR3; External Quad-SPI; NAND; eMMC | ||||
| High-Speed Connectivity | 4 PS-GTR; PCIe Gen1/2; Serial ATA 3.1; DisplayPort 1.2a; USB 3.0; SGMII | ||||
| General Connectivity | 214 PS I/O; UART; CAN; USB 2.0; I2C; SPI; 32b GPIO; Real Time Clock; Watchdog Timers; Triple Timer Counters | ||||
Zynq® UltraScale+™ RFSoC Gen 2
Direct-RF Signal Chain Features
| ZU39DR | ||
|---|---|---|
| Max. RF input Frequency (GHz) | 5 | |
| Decimation / Interpolation | 1x, 2x, 4x, 8x | |
| 12-bit RF-ADC | # of ADCs | 16 |
| Max Rate (GSPS) | 2.220 | |
| 14-bit RF-DAC | # of DACs | 16 |
| Max Rate (GSPS) | 6.554 | |
| SD-FEC | 0 | |
Programmable Logic
| ZU39DR | |
|---|---|
| System Logic Cells (K) | 930 |
| DSP Slices | 4,272 |
| Memory (Mb) | 60.5 |
| GTY Transceivers | 16 |
| PCIe Gen 3x16 | 2 |
| PCIe Gen3 x16 / Gen4 x8 / CCIX | - |
| 100G Ethernet MAC/PCS with RS-FEC | 2 |
| Maximum I/O Pins | 408 |
Processing System Features
| ZU39DR | |
|---|---|
| Application Processing Unit | Quad-core Arm® Cortex®-A53 MPCore up to 1.33GHz |
| Real-Time Processing Unit | Dual-core Arm Cortex-R5 MPCore up to 533MHz |
| Embedded and External Memory | 256KB On-Chip Memory w/ECC; External DDR4; DDR3; DDR3L; LPDDR4; LPDDR3; External Quad-SPI; NAND; eMMC |
| High-Speed Connectivity | 4 PS-GTR; PCIe Gen1/2; Serial ATA 3.1; DisplayPort 1.2a; USB 3.0; SGMII |
| General Connectivity | 214 PS I/O; UART; CAN; USB 2.0; I2C; SPI; 32b GPIO; Real Time Clock; Watchdog Timers; Triple Timer Counters |
Zynq® UltraScale+™ RFSoC Gen 3
Direct-RF Signal Chain Features
ZU42DR |
ZU43DR | ZU46DR | ZU47DR | ZU48DR | ZU49DR | ||||
|---|---|---|---|---|---|---|---|---|---|
| Max. RF input Frequency (GHz) | 6 | ||||||||
| Decimation / Interpolation | 1x, 2x, 3x, 4x, 5x, 6x, 8x, 10x, 12x, 16x, 20x, 24x, 40x | ||||||||
| 14-bit RF-ADC | # of ADCs | 8 | 2 | 4 | 8 | 4 | 8 | 8 | 16 |
| Max Rate (GSPS) | 2.5 |
5.0 |
5.0 | 2.5 | 5.0 | 5.0 | 5.0 | 2.5 | |
| 14-bit RF-DAC | # of DACs | 8 |
4 | 12 | 8 | 8 | 16 | ||
| Max Rate (GSPS) | 9.85* | 9.85* | 9.85* | 9.85* | 9.85* | 9.85* | |||
| SD-FEC | 0 | 0 | 8 | 0 | 8 | 0 | |||
*Contact your local Xilinx Sales representative for 10GSPS device support
Programmable Logic
| ZU42DR | ZU43DR | ZU46DR | ZU47DR | ZU48DR | ZU49DR | |
|---|---|---|---|---|---|---|
| System Logic Cells (K) | 489 | 930 | 930 | 930 | 930 | 930 |
| DSP Slices | 1,872 | 4,272 | 4,272 | 4,272 | 4,272 | 4,272 |
| Memory (Mb) | 67.8 | 60.5 | 60.5 | 60.5 | 60.5 | 60.5 |
| GTY Transceivers | 8 | 16 | 16 | 16 | 16 | 16 |
| PCIe Gen3x16 | - | - | - | - | - | - |
| PCIe Gen3 x16 / Gen4 x8 / CCIX | 0 | 2 | 2 | 2 | 2 | 2 |
| 100G Ethernet MAC/PCS with RS-FEC | 0 | 2 | 2 | 2 | 2 | 2 |
| Maximum I/O Pins | 152 | 347 | 360 | 347 | 347 | 408 |
Processing System Features
| ZU42DR | ZU43DR | ZU46DR | ZU47DR | ZU48DR | ZU49DR | |
|---|---|---|---|---|---|---|
| Application Processing Unit | Quad-core Arm® Cortex®-A53 MPCore up to 1.33GHz | |||||
| Real-Time Processing Unit | Dual-core Arm Cortex-R5F MPCore up to 533MHz | |||||
| Embedded and External Memory |
256KB On-Chip Memory w/ECC; External DDR4; DDR3; DDR3L; LPDDR4; LPDDR3; External Quad-SPI; NAND; eMMC |
|||||
| High-Speed Connectivity | 4 PS-GTR; PCIe Gen1/2; Serial ATA 3.1; DisplayPort 1.2a; USB 3.0; SGMII | |||||
| General Connectivity | 214 PS I/O; UART; CAN; USB 2.0; I2C; SPI; 32b GPIO; Real Time Clock; Watchdog Timers; Triple Timer Counters | |||||
Zynq® UltraScale+™ RFSoC DFE
Direct-RF Signal Chain Features
ZU65DR |
ZU67DR | |||
|---|---|---|---|---|
| Max. RF input Frequency (GHz) | 7.125 | |||
| Decimation / Interpolation | 1x, 2x, 3x, 4x, 5x, 6x, 8x, 10x, 12x, 16x, 20x, 24x, 40x | |||
| 14-bit RF-ADC | # of ADCs | 6 | 8 | 2 |
| Max Rate (GSPS) | 5.9 |
2.95 | 5.9 | |
| 14-bit RF-DAC | # of DACs | 6 |
8 | |
| Max Rate (GSPS) | 10.0* | 10.0* | ||
| DFE IP | Yes | Yes | ||
| SD-FEC | 0 | 0 | ||
*Contact your local Xilinx Sales representative for 10GSPS device support
Programmable Logic
| ZU65DR | ZU67DR | |
|---|---|---|
| System Logic Cells (K) | 489 | 489 |
| DSP Slices | 1,872 | 1,872 |
| Memory (Mb) | 67.8 | 67.8 |
| GTY Transceivers | 8 | 8 |
| PCIe Gen3x16 | 0 | 0 |
| PCIe Gen3 x16 / Gen4 x8 / CCIX | 0 | 0 |
| 100G Ethernet MAC/PCS with RS-FEC | 1 | 1 |
| Maximum I/O Pins | 152 | 152 |
Processing System Features
| ZU42DR | ZU43DR | |
|---|---|---|
| Application Processing Unit | Quad-core Arm® Cortex®-A53 MPCore up to 1.33GHz | |
| Real-Time Processing Unit | Dual-core Arm Cortex-R5F MPCore up to 533MHz | |
| Embedded and External Memory |
256KB On-Chip Memory w/ECC; External DDR4; DDR3; DDR3L; LPDDR4; LPDDR3; External Quad-SPI; NAND; eMMC | |
| High-Speed Connectivity | 4 PS-GTR; PCIe Gen1/2; Serial ATA 3.1; DisplayPort 1.2a; USB 3.0; SGMII | |
| General Connectivity | 214 PS I/O; UART; CAN; USB 2.0; I2C; SPI; 32b GPIO; Real Time Clock; Watchdog Timers; Triple Timer Counters | |
Documentation
Tools & Example Designs
A variety of solutions are available for developers to easily evaluate and debug designs on Zynq® UltraScale+™ RFSoCs. These solutions consist of tools, IP, and reference designs that enable a wide range of capabilities from performance evaluation to system-level debugging while the user design is running in hardware.
These tools serve as a platform to effectively configure and monitor Zynq UltraScale+ RFSoC features and accelerate product design cycles.
| Name | Description | |
|---|---|---|
| ZCU111 RF Data Converter Evaluation Tool | The evaluation tool consists of a reference design for the Zynq UltraScale+ RFSoC ZCU111 evaluation board with a custom GUI to configure the operation of the RF Data Converters and evaluate the performance of the RF-ADCs and RF-DACs. | |
Evaluation Tool User Guides |
Evaluation Tool Downloads |
|
| Zynq UltraScale+ RFSoC Gen 3 RF Data Converter Evaluation Tool | The evaluation tool consists of a reference design for the Zynq UltraScale+ RFSoC ZCU208 and ZCU216 evaluation boards with a custom GUI to configure the operation of the RF Data Converters and evaluate the performance of the RF-ADCs and RF-DACs. |
|
Evaluation Tool User Guides |
Evaluation Tool Downloads |
|
| RF Analyzer | The RF Analyzer tool provides an easy way to configure and debug RF Data Converters in Zynq UltraScale+ RFSoC devices on any user board. This tool enables debug capabilities using a simple GUI, interacting seamlessly with the RF Data Converter IP example design implemented on the user board. The RF Analyzer tool is only supported in the Windows environment. |
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RF Analyzer Downloads: |
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| Zynq UltraScale+ RFSoC Frequency Planner | The frequency planner aids in frequency planning for Zynq UltraScale+ RFSoC devices. | |
RFSoC Frequency Planner Downloads: |
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| Starter Designs | Vivado® ML projects enabling developers to jump-start end-to-end designs with Zynq UltraScale+ RFSoCs. | |
Design Documents: |
Design Files Downloads: |
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| Zynq UltraScale+ RFSoC demo on ZCU111 with PYNQ | With ZCU111 Evaluation Kit, this demo implements a wireless solution using PYNQ and Jupyter Notebooks. |
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Training
Designing with the Zynq UltraScale+ RFSoC
This OnDemand course provides an overview of the hard block capabilities for the Zynq® UltraScale+™ RFSoC family with a special emphasis on the Data Converter and Soft-Decision FEC blocks.
Classroom - Designing with the Zynq UltraScale+ RFSoC
Provides an overview of the hard block capabilities for the Zynq® UltraScale+™ RFSoC family with a special emphasis on the Data Converter and Soft-Decision FEC blocks.
Boards, Kits, and Modules
Visit Zynq UltraScale+ RFSoC Boards, Kits, and Modules for details and to place an order today.
