Included at no additional charge with Vivado software
Xilinx provides the AXI Datamover core which provides high throughput transfer of data from AXI4 memory mapped domain to AXI4-Stream domain and back.
The AXI Datamover is a key Interconnect Infrastructure IP which enables high throughput transfer of data between AXI4 memory mapped domain to AXI4-Stream domain. The AXI Datamover provides MM2S and S2MM AXI4-Stream channel which operate independently in a full duplex like method. The AXI Datamover is a key building block for the AXI DMA core and enables 4 kbyte address boundary protection, automatic burst partitioning, as well as providing the ability to queue multiple transfer requests using nearly the full bandwidth capabilities of the AXI4-Stream protocol. Furthermore, the AXI Datamover provides byte-level data realignment allowing memory reads and writes to any byte offset location.
Key Features and Benefits
- AXI4 Compliant
- Primary AXI4 data width support of 32, 64, 128, 256, 512, and 1,024 bits
- Primary AXI4-Stream data width support of 8, 16, 32, 64, 128, 256, 512 and 1,024 bits
- Parameterized Memory Map Burst Lengths of 2, 4, 8, 16, 32, 64, 128, and 256 data beats
- Optional Unaligned Address access; Up to 64 bit address support
- Optional General Purpose Store-And-Forward in both Memory Map to Stream (MM2S) and Stream to Memory Map (S2MM)
- Optional Indeterminate Bytes to Transfer (BTT) mode in S2MM
- Supports synchronous/asynchronous clocking for Command/Status interface