Digital Pre-Distortion (DPD)


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Product Description

AMD provides a market leading DPD solution that reduces CapEx and OpEx

Digital Pre-Distortion (DPD) is one of the most fundamental building blocks in wireless communication systems today. It is used to increase the efficiency of Power Amplifiers. By reducing the distortion created by running Power Amplifiers in their non-linear regions, Power Amplifiers can be made to be far more efficient. Wireless base stations not employing CFR or DPD algorithms typically exhibit low efficiency, and therefore high operational and capital equipment costs. A typical Class AB LDMOS Power Amplifier with WCDMA waveforms may have approximately 15-20% efficiency. With CFR and DPD turned on, this efficiency can grow to as much as 40%, resulting in tremendous savings in CapEx and OpEx for network operators. With later generations of Power Amplifier design leveraging Doherty architectures, efficiencies in the 50%+ range with Xilinx DPD are possible.

The DPD core reduces implementation time by providing a high performance DPD solution to customers as a parameterizable core rather than one that needs to be customized by hand. Furthermore, AMD DPD is tuned for implementation in AMD FPGAs, resulting in a very small FPGA footprint and the lowest cost FPGA solution available today. DPD IP now predistorts and handle long term memory effects seen with Gallium Nitride (GaN) amplifiers, enabling customers to excellent efficiency while meeting stringent spectral emission mask (SEM) requirements as well as Error Vector Magnitude (EVM) at all power levels.

DPD IP supports the following:

  • 5G NR
  • LTE-Advanced/LTE-Advanced Pro
  • WiMAX
  • CDMA2000

Key Features and Benefits


  • DPD correction with up to 40 dB of adjacent channel leakage ratio (ACLR) improvement
  • Handles long term memory effects seen with Gallium Nitride (GaN) Amplifiers to meet stringent FCC and 3GPP MIMO requirements


  • Support for SMP mode under Linux Operating System. Currently, only AMD SoCs can host DPD IP, as a PS running Linux is mandatory
  • C API for Host Processor
  • DFE Reference Design included

Physical Configuration Parameters

  • Selection of phase options for datapath implementation allowing a resource/sample rate trade off
  • Selection of one, two, four, six or eight transmit antennas
  • Multiple filter and capture depth options, delivers a highly adaptable solution which enables cost optimized solution for macro Base Stations, massive MIMO 5G RRH, micro Remote Radio Head (RRH), Distributed Antenna System (DAS), and low power PA applications, independent control of filter memory and capture memory depth and acceleration levels allowing for resource versus performance trade-off


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