Product Description
Important Note
SPDIF is now bundled with Vivado
Xilinx provides a SPDIF/AES3 Controller to transport audio data.
The Sony/Philips Digital Interconnect Format (SPDIF) and AES3 are digital audio interfaces that implements the International Electronic Commission (IEC) 60958 interface for transmitting and receiving audio data. AES3 and SPDIF at the protocol level are same but use different physical interfaces primarily driven by their end application needs. AES3 is commonly used in professional audio and video equipment where as SPDIF is more popular in the consumer media devices. AMD offers a single core to implement the AES3 and SPDIF controller but users should be aware the differences in the physical interfaces. The core also includes standard bus interfaces to the AMBA® AXI4-Lite and AXI4-Stream interfaces, allowing for integration to the IP core with a master system for further processing of audio data. Data collected by the LogiCORE™ IP SPDIF core is stored in the core’s internal FIFO, allowing the system to process a relatively slow audio stream.
Key Features and Benefits
- Configurable as an SPDIF/AES3 audio data transmitter or an SPDIF/AES3 audio data
- Configurable FIFO buffer stores the audio sample data
SPDIF/AES3 controller
- IEC 60958-3 standard SPDIF/AES3 digital audio bus interface
- Two audio channels • Audio sample lengths of 16/20/24 bits
- Data recovery from the bi-phase mark encoded SPDIF/AES3 data when the IP core is in receive mode
- Variable sampling rates (32/44.1/48/88.2/96/ 176.4/192 kHz)
- The SPDIF/AES3 transmitter sends the invalid null audio frames over the SPDIF/AES3 line in case of a FIFO under-run condition
AXI4-Stream Interface
- Based on AXI4-Stream specification
- Master/slave on AXI4 streaming interface
- 32-bit data width support
- Continuous aligned streams only (no null or positional bytes transmission support)
AXI4-Lite Interface
- Register access support through the AXI4-Lite interface
- 32-bit data width support