The Xilinx® LogiCORE™ AXI Firewall IP is designed to protect AXI DMA from hangs and protocol violations downstream of it that may otherwise lead to host crashes.
AXI Firewall IP core propagates AXI traffic between its slave and master interfaces, while actively checking for protocol violations in the transfers. Offending transfers are blocked, as well as any further transfers.
This protects the upstream network, allowing it to keep operating in the event of a downstream failure. A control-register interface on the core can then be used to read information about the error status and to initiate recovery of the firewall.