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  3. Multi-Channel 25G RS-FEC

Multi-Channel 25G RS-FEC

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Overview

Product Description

The Multi-Channel 25G Reed-Solomon Forward Error Correction implements the Reed-Solomon Forward Error Correction (RS-FEC) sublayer for one to four 25G Ethernet channels, making use of the hard 100G RS-FEC IP block in the Xilinx® UltraScale+™ devices.

Key Features and Benefits

  • Support for between 1 and 4 parallel 25GE channels using hard RS-FEC function in UltraScale+™ CMAC block (Virtex/Kintex/Zynq)
  • Conform to IEEE Std 802.3by and 25/50G Gigabit Ethernet Consortium Schedule 3 (v1.6) (http://25gethernet.org/) specificationsPin-level interface compatible with Xilinx® 25G Ethernet subsystem IP
  • Support for RS(528,514) encode and decode
  • Support for alignment, transcoding and alignment marker mapping
  • Support for standard ±200PPM differences between receive channels’ recovered clocks
  • Support for symbol error statistics per channel
  • Supports latency measurement per channel, including delay added by buffering and CDC
  • Support for Virtex® UltraScale+™ and some Kintex® UltraScale+™ parts (with CMAC)
  • Support speed grades down to -1L

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