8254 Timer
- Part Number: iW-8254 Programmable Timer
- Vendor: iWave Systems Technologies Pvt. Ltd.
- Partner Tier: Premier
Product Description
8254 Programmable Timer is used for timing control applications in microcomputer systems. The design is capable of generating accurate time delays under software control.
Key Features and Benefits
- Compatible to 8254 and uPD71054
- Timers can be configured to operate in one of the six operating modes supported
- Interrupt at the End of the Count
- GATE Re-triggerable One-Shot
- Rate Generator
- Square Wave Generator
- Software-Triggered Strobe
- Re-triggerable Hardware-Triggered Strobe
Featured Documents
Device Implementation Matrix
Device utilization metrics for example implementations of this core. Contact provider for more information.
| Family | Device | Speed Grade | Tool Version | HW Validated? | Slice | LUT | BRAM | DSP48 | CMT | GTx | FMAX (Mhz) |
|---|---|---|---|---|---|---|---|---|---|---|---|
| Zynq-7000 Family | XC7Z030 | -1 | Vivado 2019.2 | Y | 345 | 369 | 0 | 0 | 0 | 0 | 280 |
IP Quality Metrics
General Information
| This Data was Current On | Oct 23, 2023 |
| Current IP Revision Number | R1.0 |
| Date Current Revision was Released | Dec 24, 2011 |
| Release Date of First Version | Dec 24, 2011 |
Production Use by Xilinx Customers
| Number of Successful Xilinx Customer Production Projects | 3 |
| Can References be Made Available? | Y |
Deliverables
| IP Formats Available for Purchase | Source Code |
| Source Code Format(s) | Verilog |
| High-Level Model Included? | N |
| Integration Testbench Provided | Y |
| Integration Test Bench Format(s) | Verilog |
| Code Coverage Report Provided? | N |
| Functional Coverage Report Provided? | N |
| UCFs Provided? | UCF |
| Commercial Evaluation Board Available? | N |
| Software Drivers Provided? | N |
| Driver OS Support | N/A |
Implementation
| Code Optimized for Xilinx? | Y |
| Standard FPGA Optimization Techniques | Inference |
| Custom FPGA Optimization Techniques | None |
| Synthesis Software Tools Supported/Version | Xilinx XST |
| Static Timing Analysis Performed? | N |
| AXI Interfaces | AXI4 |
| IP-XACT Metadata Included? | N |
Verification
| Is a Document Verification Plan Available? | Executable and documented plan |
| Test Methodology | Directed Testing |
| Assertions | N |
| Coverage Metrics Collected | None |
| Timing Verification Performed? | Y |
| Timing Verification Report Available | Y |
| Simulators Supported | Xilinx lSim |
Hardware Validation
| Validated on FPGA | Y |
| Hardware Validation Platform Used | custom |
| Industry Standard Compliance Testing Passed | N |
| Specific Compliance Test | N/A |
| Are Test Results Available? | Y |