Enables next generation 5G eCPRI wireless applications
The Xilinx® Radio over Ethernet Framer (RoE Framer) core is part of a complete subsystem solution developed on the Zynq® UltraScale+™ MPSoC, relying on both hardware and software to provide a comprehensive and efficient computing platform for the required protocols and features: eCPRI, IEEE 1914.3, IEEE 1588, Synchronous Ethernet, Node and Network OAM. The core enables radio data transmission through a packet-based transport network connecting Remote Radio Units (RRU) to the centralized Baseband Unit (BBU).
Key Features and Benefits
- Includes eCPRI example design
- Supports IEEE 802.1 Ethernet packets, optionally including VLAN tags, as well as UDP over IPv4 or IPv6.
- Automates in hardware the encapsulation and extraction of I/Q radio samples in and from the transported packets, formed according to the eCPRI Specification V1.1
- Supports different functional decompositions between RRUs and BBUs and can transport either time domain or frequency domain I/Q samples.
- Fully compatible with xRAN Control, User and Synchronization Plane Specification v1.0.
- Supports up to four 10 Gb/s or two 25 Gb/s Ethernet ports, relying on 10G/25G High Speed Ethernet Subsystem instantiation.
- Each I/Q sample input and output port is implemented as a 64-bit AXI4-Stream interface and the number of supported interfaces can be either 1, 2, 4, 8, or 16. Transport packet sizes and internal buffers are fully customizable.
- Real-time control packets can be associated to each radio data flow. The size and format of control packets can be programmed independently from data packets.
- Programmable reception window to support networks with different packet delay variation.
- Time alignment using IEEE 1588, the subsystem can also align the generation and collection of I/Q samples to the 10ms Start of Radio Frame pulse.
- Supports all eCPRI message types, including one-way delay measurement based on PCS/PMA level timestamps, relying on API software.