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System Monitor and XADC

Xilinx continues to offer highly integrated and comprehensive System Monitor (SYSMON) functionality for the 7 Series, Zynq®-7000, UltraScale™, UltraScale+ and Versal product families. This convenient feature facilitates monitoring of the physical operating conditions of your FPGA, SOC or ACAP including device junction temperature, supply voltages, and external voltages – a key requirement for many industry standards, including FIPS 140-2, IEC 61508, and ISO26262.

Versal SYSMON resides in the new Platform Management Controller (PMC) allowing quick access to registers on boot and allows for 160 channels capable of sampling at 8kSPS on all channels and 16 sample averaging on all inputs. It also employs a new register-based interrupt capability to replace the previous generations EOC and EOS pins.

The improved internal reference Voltage promises to on-par accuracy as the recommended external Voltage reference meeting Voltage sense accuracy of ±1% allowing to reduce overall system BOM.

Device Support

 

7-Series & Zynq-7000


UltraScale

UltraScale+

Versal

AMS  Block

XADC

SYSMON

SYSMON

SYSMON

Location PL PL PS & PL PMC
No. of External Inputs 17 17 17 17
Averaging 16, 64 or 256 16, 64 or 256 16, 64 or 256 2, 4, 8 or 16

ADCs

Dual 12-bit, 1 MSPS

10-bit, 0.2 MSPS

10-bit, 0.2 MSPS & 1MSPS

10-bit, 0.2 MSPS & 1MSPS

Voltage Reference On-Chip or External On-Chip or External On-Chip or External On-Chip or External
Alarm Outputs 8 16 16 16

Interface

JTAG, DRP, AXI

I2C, JTAG, DRP, AXI

PMBus, I2C, JTAG, DRP, AXI, ATB

PMBus, I2C, JTAG & AXI via PMC

System Monitor (SYSMON)

Xilinx continues to offer highly integrated and comprehensive System Monitor (SYSMON) functionality for the 7 Series, Zynq®-7000, UltraScale™, UltraScale+ and Versal product families. This convenient feature facilitates monitoring of the physical operating conditions of your FPGA, SOC or ACAP such as junction temperature, supply voltages, and external measurements via ADC – a key requirement for many industry standards, including FIPS 140-2, IEC 61508, and ISO26262.

Versal SYSMON resides in the new Platform Management Controller (PMC) allowing quick access to registers on boot and allows for 160 channels[1] capable of sampling at 8kSPS on all channels with 16 sample averaging on all inputs. It also employs a new register-based interrupt capability to replace the previous generations EOC and EOS pins. The improved internal reference Voltage delivers on-par accuracy with an external Voltage reference of ±1%, reducing overall system BOM cost and PCB footprint.

Xilinx’s System Monitor technology enhances the overall safety, security, and reliability of your system and is a key part of the power management infrastructure for any system capable of I2C/PMBus telemetry to provide information on supplies, temperature and external inputs for your Xilinx device and various other on-board supplies.

System Monitor Architecture Overview

  • 17 differential external inputs for system measurement and monitoring
  • High accuracy ADC inputs for digitizing voltages, currents[2], temperatures and more
  • On-chip supply voltage sensors accurate to ±1% [3]
  • High accuracy on-chip temperature sensor and telemetry
  • Interrupt based voltage and temperature alarms
  • Direct access via DRP, JTAG, I2C, PMBus or AXI

Xilinx’s Control, Interfaces and Processing System (CIPS) IP within Vivado allows for easy programming of SysMon with Versal devices and System Management Wizard  can be used to easily configure the SYSMON to operate to the particular system requirements for UltraScale+ and previous generation devices.

XADC - Integrated Analog with Digital Customization

The 7-Series FPGA and Zynq-7000 SoC AMS technology provides use models ranging from simple system monitoring to more complex analog measurements that require digital post-processing such as linearization, filtering, calibration, and oversampling. The XADC delivers advantages in flexibility, integration, and cost savings across a wide range of applications.

The 7-series FPGAs and Zynq-7000 SoCs integrate the Xilinx XADC block featuring additional Analog Mixed Signal (AMS) functionality. In addition to performing system monitoring functions, the XADC can directly replace discrete analog-to-digital converters required in many applications, e.g. Motor Control and Power Conversion, reducing BOM cost and control loop latency.

XADC Architecture Overview

  • Dual 12-bit 1Msps analog-to-digital converters
  • Dual independent rack and hold (T/H) amplifiers
  • On-chip voltage references
  • On-chip thermal and supply sensors
  • External analog input channels

Key Documents

[1] Some supply IDs for SYSMON measurements are reserved for internal functions
[2] An external shunt resistor is required to measure current
[3] See DC and AC Switching Characteristics for more details