Featuring Kintex®-7 and Virtex®-6 FPGA Connectivity Kits
Jump-start your development with Targeted Reference Designs with support for ISE® Design Suite and the AXI4 Interconnect Standard
The ISE Design Suite delivers a complete solution for connectivity design providing the front-to-back methodology and IP required to enable designers to achieve greater designer productivity, focus on design differentiation, shrink time to production, attain breakthrough performance, power and cost benefits.
The Logic Edition includes Xilinx exclusive tools and technologies for design entry, synthesis, implementation, and verification to help achieve optimal design results in the shortest time.
Complete high-speed serial design methodology and tool flow
Serial Rapid IOXilinx provides end-to-end connectivity solutions supporting serial and parallel protocols. The support for many of these protocols is provided through Xilinx IP LogiCOREs that enable you to maximize design flexibility and reduce risk. In addition they are pre-verified for serial I/O standards and are certified through industry-wide IP interoperability and certification programs. All Xilinx IP is delivered through the CORE Generator™ system to help streamline your design process and improve design quality.
Xilinx support for protocols and technology
|By Use Model|
|CPRI||SONET/ SDH OC-3 to OC-768||Interlaken|
|PCI Express||PCI Express|
|Serial Rapid IO||Serial Rapid IO|
|By Market Segment|
|Aerospace and Defense||Audio Video Broadcast||Automotive|
|Serial Rapid IO||Ethernet|
|Serial Rapid IO||PCI Express||Ethernet|
|Serial Rapid IO||Interlaken|
Learn more about how support for the AXI4 Interface Protocol offers greater productivity, flexibility, and availability for FPGA designers.
Additional IP is available through the Xilinx IP Center.
Xilinx provides a complete connectivity design environment through evaluation kits to accelerate design development by integrating critical components required for creating an application targeted towards Xilinx FPGAs.
Development kits to prototype, evaluate and debug your FPGA design implementations
Targeted reference designs to accelerate your design development