UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Page Bookmarked

Connectivity

Xilinx connectivity platforms enable the fastest deployment of customer end-product systems across the serial spectrum - mainstream through ultra-high end - and provide valuable benefits for architecting your application.

Connectivity Benefits

  • Spartan®-6 FPGAs with up to 8 GTP 3.125Gbps transceivers satisfy the cost, ease-of-use, and low power needs of high-volume electronics, such as automotive infotainment systems, high-resolution consumer displays
  • Virtex®-6 LXT and SXT FPGAs with up to 36 GTX 6.5Gbps transceivers and performance margins that exceed the demands of high-speed protocols (e.g., Interlaken and PCIe® 2.0) are ideal for multi-protocol systems, such as wireless base stations, switches and routers, and professional video equipment
  • Virtex-6 HXT FPGAs with up to 72 serial IO channels (48 GTX and 24 11Gbps GTH) transceivers save over 80 percent in transceiver power compared to solutions with external physical layer (PHY) for 40G/100G applications
    • These include transponders/muxponders, traffic managers, and packet processors for wired communications; high-performance data encryption engines; advanced medical imaging; and digital video production, editing and broadcast equipment
  • The AXI4 interconnect standard enables system designers to optimize their designs for the highest possible Fmax, maximum throughput, lower latency, smaller area or some combination of those attributes
  • State-of-the-art serial connectivity tools integrated in the ISE® Design Suite software
  • Implement both established as well as cutting edge protocols still being defined
  • Comprehensive IP portfolio including industry leading serial protocols
  • The AXI4 interconnect standard eliminates the need for multiple legacy or custom interfaces necessary to integrate IP from various sources
  • Focus on innovation by leveraging the infrastructure building blocks provided by Xilinx in the targeted design platforms optimized for connectivity
  • Accelerate evaluation, prototyping, design, and debug using Xilinx scalable board strategy including FPGA Mezzanine Card (FMC) connectors
  • Get started, begin evaluation, and modify Xilinx connectivity targeted reference designs delivered with every kit and supported, maintained and updated with every ISE Design Suite release

Xilinx Connectivity Design Platform

Featuring Kintex®-7 and Virtex®-6 FPGA Connectivity Kits

  • Rapid deployment of serial/parallel protocol design
  • Broad IP portfolio with support for industry protocols
  • Flexibility and productivity with AXI4 interconnect

Jump-start your development with Targeted Reference Designs with support for ISE® Design Suite and the AXI4 Interconnect Standard

Connectivity Platform Elements

  • Virtex-7 HT devices with integrated 28Gb/s serial transceivers offer an unprecedented 2.8Tb/s of serial bandwidth with up to 16 x 28 Gb/s serial transceivers for ultra-high bandwidth applications. These devices are optimized for next-generation 100G, nx100G and 400G line cards with CFP2 optical interfaces.
  • Virtex-7 T devices deliver unprecedented levels of capacity and performance enabling ASIC prototyping, emulation and replacement with up to 2M logic cells, 6.8 billion transistors and 12.5Gb/s serial transceivers on a single device.
  • Virtex-7 XT devices offer the highest processing bandwidth with high performance transceivers, DSP and BRAM and integrates up to 96 10G Base KR backplane capable serial transceivers.
  • Virtex-6 HXT FPGA with up to 72 serial I/O channels (24 GTH transceivers and 48 GTX transceivers) provide over 0.5Tb/s serial I/O bandwidth to design 40G and 100G applications in a single FPGA
    • When combined, the select IO bandwidth the aggregate IO bandwidth is over 1Tbps
  • Virtex-6 LXT and SXT FPGAs deliver GTX transceivers
    • Most flexible transceiver in any FPGA
    • Enables designing with a multitude of serial protocols
    • Industry’s best hardware PCS features that simplify usage
    • Aids faster debug and accelerates adoption of complex serial protocols for all applications
  • Spartan-6 LXT FPGAs are the lowest cost FPGAs with GTP serial transceivers
    • Optimized to fully support the most common serial standards: PCI Express®, Gigabit Ethernet, Display Port and more
    • Highly efficient and dedicated clocking sources enables each GTP transceiver to be configured to support a different serial protocol
  • All Xilinx Virtex-6 and Spartan-6 FPGAs also include configurable SelectIO™ technology to support multi-voltage, multi-standard parallel connectivity technologies - HSTL, LVDS (SDR and DDR) and more

The ISE Design Suite delivers a complete solution for connectivity design providing the front-to-back methodology and IP required to enable designers to achieve greater designer productivity, focus on design differentiation, shrink time to production, attain breakthrough performance, power and cost benefits.

The Logic Edition includes Xilinx exclusive tools and technologies for design entry, synthesis, implementation, and verification to help achieve optimal design results in the shortest time.

Complete high-speed serial design methodology and tool flow

  • Design Tools: ISE Design Suite Logic Edition
    • Architecture Wizards - Transceiver, Clocking, CRC Wizards
    • Design analysis and synthesis - PlanAhead™™ (FloorPlanning and PinLayout), XST
    • Implementation tools - MAP, Timing driven P&R, SmartXplorer
    • Debug tools - ChipScope™ Pro, SerialIO ToolKit, FPGA Editor, IBERT LogiCORE™
  • Guidelines and reports
    • Signal integrity considerations
    • Transceiver characterization general and protocol specific reports
  • Documentation
    • Datasheets and user guides
    • White papers
    • Application notes
    • Reference designs

Serial Rapid IOXilinx provides end-to-end connectivity solutions supporting serial and parallel protocols. The support for many of these protocols is provided through Xilinx IP LogiCOREs that enable you to maximize design flexibility and reduce risk. In addition they are pre-verified for serial I/O standards and are certified through industry-wide IP interoperability and certification programs. All Xilinx IP is delivered through the CORE Generator™™ system to help streamline your design process and improve design quality.

Xilinx support for protocols and technology

By Use Model
Backplane Box-to-Box Chip-to-Chip
Ethernet Ethernet Aurora
OBSAI HD-SDI CAN
CPRI SONET/ SDH OC-3 to OC-768 Interlaken
PCI Express   PCI Express
Serial Rapid IO   Serial Rapid IO
    SFi-S
    SPAUI
    SPI3
    SPI4.2
     
By Market Segment
Aerospace and Defense Audio Video Broadcast Automotive
Aurora Aurora CAN
PCI Express DisplayPort  
Serial Rapid IO Ethernet  
SPI4.2 PCI Express  
     
Compute Industrial/Medical Wired Communications
PCI Express Ethernet Aurora
Serial Rapid IO PCI Express Ethernet
  Serial Rapid IO Interlaken
    PCI Express
    SPI3
    SPI4.2

Learn more about how support for the AXI4 Interface Protocol offers greater productivity, flexibility, and availability for FPGA designers.

Certification

  • Xilinx provides a UNH tested Ethernet IP cores with integrated serial interface to ensure first time success
  • SPI-4.2 core interoperability testing completed with leading framers (e.g. PMC, Vitesse) and NPUs (e.g. Netronome IXP2800)
  • Passes all PCI-SIG specified compliance tests for PCI Express and listed on PCI-SIG integrators list

Additional IP is available through the Xilinx IP Center.

Xilinx provides a complete connectivity design environment through evaluation kits to accelerate design development by integrating critical components required for creating an application targeted towards Xilinx FPGAs.

Development kits to prototype, evaluate and debug your FPGA design implementations

Targeted reference designs to accelerate your design development

  • Delivered with connectivity kits
  • Design framework
    • Demonstrates critical components working together in a system environment
  • Maintained/ updated with ISE Design Suite release
  • Fully supported
  • Integrates Xilinx and other 3rd party IP deliverables
  • Extends functionality of the evaluation kits through design and/ or hardware

Featured Alliance Member