ML505

This user guide introduces several designs that demonstrate Virtex®-5 device features, including RocketIO™ GTP transceiver capabilities, using the ML505 (LXT) and ML506 (SXT) Evaluation Platforms.

The ML505/ML506 Getting Started Tutorial provides step-by-step instructions for setting up and using the Virtex®-5 ML505 and ML506 Evaluation Platforms. These boards come with a number of pre-installed demonstrations. This tutorial guides you through these demonstrations and provides instructions to run them on the ML505/ML506 Evaluation Platforms.

The ML50x boards enable designers to investigate and experiment with features of Virtex™-5 FPGAs. This user guide describes the features and operation of the ML505 (LXT), ML506 (SXT), and ML507 (FXT) Evaluation Platforms.

This is the PDF for ML505/ML506 schematics. The PCB files (Allegro 15.x) and schematic source files (Viewdraw) are accessible from the link below.

This reference system demonstrates the functionality of the PLBv46 Endpoint Bridge for PCI Express® used in the Xilinx ML505 Embedded Development Platform.

This guide provides a Video Over IP overview. It discusses the ASI to IP Bridge and the IP to ASI Bridge.

This is the PDF for ML505, ML506, and ML507 schematics. The PCB files (Allegro 15.x) and schematic source files (Viewdraw) are accessible from the link below.