UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

MicroBlaze Soft Processor Core

MicroBlaze™ is a key element of Xilinx’s Embedded Product Portfolio. As a full-featured, FPGA optimized 32-bit Reduced Instruction Set Computer (RISC) soft processor, Microblaze meet requirements for diverse applications such as industrial, medical, automotive, consumer, and communication infrastructure markets among others. MicroBlaze is a highly configurable and easy to use processor and can be used across FPGAs and All Programmable (AP) SoC families. It is included free with Vivado® Design and System Edition and Vivado Webpack Edition. It is also available as part of legacy IDS embedded edition for older FPGA device families like Spartan®-6, Virtex®-6 etc.

MicroBlaze is highly configurable IP core supporting 70+ configuration options. Some of the key configuration options are Instruction/Data Cache, Floating Point unit, Memory Management Unit etc. With highly flexible and configurable core, user can implement virtually any processor use case, from a very-small-footprint state machine or microcontroller to a high-performance, compute-intensive microprocessor-based system running Linux. The IP can be configured to operate in either a three-stage pipeline mode (to optimize for size), or in a five-stage pipeline mode (to optimize for speed)—thus delivering faster DMIPs performance than any other FPGA-based soft processing solution.

MicroBlaze Performance Metrics: Based on Vivado 2017.1

Device Performance Optimized MicroBlaze with Branch Optimizations Performance Optimized MicroBlaze Area Optimized MicroBlaze Frequency Optimized MicroBlaze with Branch Optimization
  (5-stage pipeline) (5-stage pipeline) (3-stage pipeline) (8-stage pipeline)
  1.45 DMIPs/MHz 1.34 DMIPs/MHz 1.07 DMIPs/MHZ 1.07 DMIPs/MHz
  Fmax DMIPs Fmax DMIPs Fmax DMIPs Fmax DMIPs
Virtex-7 (-3) 244 354 341 457 290
310 304 325
Kintex-7 (-3)
236 342 339 454
293
314 294 315
Artix-7 (-3) 181 262 229 307 216 231 197 211
Kintex UltraScale (-3) 309
448 384 515
367 393 350 375
Virtex UltraScale (-3) 299
434 371 497
360 385 345 369
Kintex UltraScale+ (-3) 410
595 530 710 495 530 483 517
Virtex UltraScale+ (-3) 421 610
560 750
511
547
490 524
Zynq UltraScale+ (-3) 425
616
547
733
514
550
471 504
Spartan-7 (-2) 157 228 200 268 183 196 169 181

Note: Zynq-7000 AP SoC performance numbers are same as Artix-7 and Kintex-7 depending on Zynq-7000 device

Simplify your life - MicroBlaze Configuration Wizard

For highly configurable MicroBlaze processor, Xilinx offers Configuration Wizard tool for ease of use. The tool provides pre-defined quick configuration options to user. Instead of configuring from 70 odd options, customer can select pre-defined option based on use case. Table below captures various pre-configuration options and typical use case description.

Pre-Defined Configuration Brief Description
Minimum Area Smallest possible MicroBlaze core, no caches, no debug
Maximum performance Large caches, debug and execution unit
Maximum Frequency Maximum achievable frequency. Small caches and no debug, with few execution units
Linux with MMU Settings suitable to get high performance when running Linux with Memory Management Unit (MMU). Memory Management enabled, large caches and debug, and all execution units
Low-en Linux with MMU Settings corresponding to the MicroBlaze Embedded Reference System. Provides suitable settings for Linux development on low-end systems. Memory Management enabled, small caches and debug
Typical Settings giving a reasonable compromise between performance, area, and frequency. Suitable for standalone programs, and low-overhead kernels. Caches and debug enabled

User can opt for 2 step configuration flow, first one is to select pre-defined configuration as listed in Table 1 and then fine tune few select configuration options to suit exact use case.

  • 3 or 5 stage pipeline support
  • Native AXI-4 support
  • AXI Coherency Extension (ACE) Support
  • Cache line word length: 4, 8 or 16
  • Area or Speed Optimized configuration option
  • Support for Memory Management Unit
  • Low latency Interrupt mode support
  • Fault Tolerance, including Error Correction Codes (ECC) and Lockstep support
  • MPU mode for region protection for secure RTOS applications
  • Instruction and Data Caches
    • Cache size configurable: 2kB - 64kB (Block RAM based)
  • Local Memory Bus (LMB) Instruction and Data side interface
  • Hardware Barrel Shifter
  • Hardware Multiplier and Divider
  • Upto 16 AXI Stream interfaces
  • Floating Point Unit (Single Precision, IEEE 754 compatible)
  • Processor Version Register
  • Relocatable Base Vectors
  • Support for Sleep mode and Sleep instruction
  • Extended Debug Support: Performance Monitoring, Performance Trace, Non-Intrusive profiling

For More Information

MicroBlaze is an integral part of the complete Xilinx embedded solution. It is available through Vivado Integrated Design Environment and legacy ISE Embedded Edition. For software development it is supported as part of Software Development Kit, for hardware design, MicroBlaze and Xilinx IP portfolio together can be used with Vivado IP Integrator.

Page Bookmarked