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Xilinx Zynq-7000 All Programmable SoC ZC702 Evaluation Kit

Product Description

The Zynq®-7000 AP SoC ZC702 Evaluation Kit includes all the basic components of hardware, design tools, IP, and pre-verified reference designs including a targeted design, enabling a complete embedded processing platform. The included pre-verified reference designs and industry-standard FPGA Mezzanine Connectors (FMC) allow scaling and customization with daughter cards.

Key Features & Benefits

  • Optimized for quickly prototyping embedded applications using Zynq-7000 SoCs
  • Hardware, design tools, IP, and pre-verified reference designs
  • Demonstrates a embedded design, targeting video pipeline
  • Advanced memory interface with 1GB DDR3 Component Memory
  • Enabling serial connectivity with USB OTG, UART, IIC, CAN Bus
  • Supports embedded processing with Dual ARM Cortex-A9 core processors
  • Develop networking applications with 10-100-1000 Mbps Ethernet (GMII, RGMII and SGMII​)
  • Implement Video display applications with HDMI out
  • Expand I/O with the FPGA Mezzanine Card (FMC) interface

What's Included

  • ZC702 evaluation board featuring the XC7Z020 CLG484 -1 AP SoC
  • Full seat Vivado® Design Suite: Design Edition
    • Node locked & Device-locked to the Zynq-7000 XC7Z020 SoC, with 1 year of updates and support
  • AMS 101 evaluation board
  • Printed Quick Start Guide 
  • Targeted Reference Design showcases various embedded domain features and capabilities with a Linux-based video pipeline design
  • Board Design Files (DxDesigner 2005,  Allegro 16.3 – 16.5)
  • Cables & Power Supply

Featured Documents

ek-z7-zc702-g-base-board

Key Features

Zynq-7000 XC7Z020 CLG484 -1

  • ROHS compliant ZC702 kit including the XC7Z020-CLG484-1 AP SoC Power 12V wall adapter or ATX voltage and current measurement capability of supplies

Configuration

  • Onboard configuration circuitry
  • 16MB Quad SPI Flash
  • SDIO Card Interface (boot)
  • PC4 and 20 pin JTAG ports

Memory

  • DDR3 Component Memory 1GB
  • Support 32 data width
  • 16MB Quad SPI Flash
  • IIC - 1 KB EEPROM

Communication & Networking

  • Gigabit Ethernet GMII, RGMII and SGMII
  • USB OTG 1 (PS) - Host USB
  • IIC Bus Headers/HUB (PS)
  • 1 CAN with Wake on CAN (PS)
  • USB UART (PS)

Video/ Display

  • HDMI Video OUT
  • 8X LEDs

 

Expansion Connectors

  • FMC #1-LPC connector (0 GTX Transceiver, 68 single-ended or 34 differential user defined signals)
  • FMC #2-LPC connector (0 GTX Transceiver, 68 single-ended or 34 differential user defined signals)
  • IIC HUB/Expander
  • Dual Pmod (8 I/O Shared with LED's)
  • Single Pmod (4 I/O Shared with PJTAG)

Clocking

  • 200MHz Fixed PL Oscillator (Differential LVDS)
  • 156.25MHz (default) I2C Programmable Oscillator (Differential LVDS)
  • 33.33MHz Fixed PS System Oscillator (Single-Ended CMOS)

Control & I/O

  • 3 User Push Buttons
  • 2 User Switches
  • 8 User LEDs

Power

  • 12V wall adapter or ATX
  • Voltage and Current measurement capability of supplies

Analog

  • XADC header

Highlighted Partner Bill of Materials (BOM)

Provider Name Product Category Item
Analog Devices Inc Component ADV7511 HDMI transmitter
SiTime Component SiT9102AI-243N25E200.00000
SiT8102AN-23-25E-12.00000
SiT8103AC-23-18E-33.33333
Xilinx Power Management design examples Power management vendor products and tools
ams-101-evaluation-card

Key Features

Download the AMS Evaluator and your design files at the Xilinx support site.

  • Analog evaluation card connects to XADC header
  • Evaluates XADC 12-bit, 17-channel, 1Msps dual ADCs and Analog Mixed Signal technology
  • Pins and BNC mini grabbers allow for external analog input signals
  • On-board 16-bit dual DAC for analog test signals
    • Reference designs allow sine wave or DC test signals
  • AMS101 Evaluation card pairs with free AMS Evaluator tool for analyzing analog data, internal temperature and voltage measurements, and saving data to a .csv file

Included in this Kit

Design tools

Name Description License Type
Vivado Design Suite: Design Edition The Xilinx Vivado® Design Suite is a revolutionary IP and System Centric design environment built from the ground up to accelerate the design for all programmable devices. Node locked & Device-locked to the Zynq-7000 XC7Z020 SoC, with 1 year of updates

Additional Tools, IP and Resources

Provider Name Product Category Item Description
Red Hat Operating System Fedora v16.2 being used for 7-series and ZYNQ TRDs
Open Source Software Tool TeraTerm One of many possible terminal emulators used for serial connection from your PC to the evaluation kit.