AEDs can be thought of as an electrocardiogram or ECG, or a multi-parameter patient monitor, that also provides life-saving therapy. ECGs monitor heart signals via electrodes connected to specific locations on the human body. These signals, on the order of a few millivolts in amplitude, are difficult to discern against a noisy background, but are used to accurately determine a person’s QRS complex.
The QRS complex is what’s commonly used by doctors to diagnose a wide range of heart conditions, such as arrhythmia or even atrial or ventricular fibrillation. The AED uses the same QRS complex to make the decision to provide therapy, or the shock to restart or resynchronize the heart.
Reliability, easy-to-use HMI, accuracy, fast boot times, power management, and security are just some of the key considerations for AEDs. These systems need to have the processing power powerful enough to acquire, process, and interpret several parameters at once, while also providing a friendly, straightforward, and safe HMI.
A simplified architecture of a typical AED can have a built in SVGA resolution display, a touch screen HMI and potentially a separate external display connectivity to a high definition monitor to provide training or maybe showing a related video. Modern AEDs are getting networked with wired and wireless connectivity.
Here is a high-level block diagram to create a smart, connected, high performance low power AED device with a dual or quad core Zynq Ultrascale+ MPSOC with an optimally configured fabric depending on the performance per watt and BOM cost requirements. Depending on the architectural requirements and if it’s a lower-end AED, a Zynq 7000 device can also be used.
Defibrillators can be smart and connected to the network in the back-end. A smart Defib/Monitor (like a patient-vest) would have the capability to send secure data to the cloud (Hybrid or Private) for analytics and storage. It will also be able to support local and networked high-definition displays.
The processing systems in a Zynq family of SoC-FPGA devices both in UltraScale and UltraScale+ architectures are very powerful and competitive to any ASSP devices available. A complex architecture could support using a hypervisor with guest OS versions running Linux for a variety of tasks like control plane, monitoring, diagnostics and analytics. Many supported RTOS like QNX, VxWorks, Micrium or ThreadX can be used for real-time tasks.
So, here are a few points to summarize the benefits of a Zynq UltraScale+ based clinical architecture: