Xilinx All Programmable 3D ICs utilize stacked silicon interconnect (SSI) technology to break through the limitations of Moore’s law and deliver the capabilities to satisfy the most demanding design requirements. Xilinx homogeneous and heterogeneous 3D ICs deliver the highest logic density, bandwidth, and on-chip resources in the industry, breaking new ground in system-level integration.
Xilinx 28nm homogeneous and heterogeneous 3D ICs double the design capacity, system level performance, and level of systems integration relative to what was possible with a pure monolithic solution—creating an extra generation of value and offering the manufacturing and time-to-volume advantages of smaller die. Both FPGA and transceiver mixed signal die are integrated with over 10,000 programmable interconnect through a silicon interposer in Xilinx’s innovative stacked silicon interconnect (SSI) technology.
Xilinx UltraScale™ 3D ICs provide unprecedented levels of system integration, performance and capability. Both Virtex® UltraScale 3D ICs and Kintex® UltraScale 3D ICs contain a step-function increase in both the amount of connectivity resources and the associated inter-die bandwidth in this second-generation 3D IC architecture. The big increase in routing and bandwidth and new 3D IC wide memory optimized interface ensures that next-generation applications can achieve their target performance at extreme levels of utilization.
There are ten 3D IC devices in Xilinx’s Virtex-7, Kintex UltraScale and Virtex UltraScale families– thereby offering customers a broad range of resources and capabilities to match leading edge demands. The SSI-enabled devices shown below offer unprecedented FPGA capabilities and are ideal for applications such as next-generation wired communications, high-performance computing, medical image processing, and ASIC prototyping/emulation.
|Xilinx 3D IC Devices|
To address the typical challenges of interconnecting multiple FPGAs, Xilinx 3D IC devices utilize Stacked Silicon Interconnect technology, enabling high-bandwidth connectivity between multiple die and providing a 100x improvement in inter-die bandwidth per watt compared to multi-chip approaches. It also imposes much lower latency and consumes dramatically lower power than either the multi-FPGA or multi-chip module approach, while enabling the integration of transceivers and on-chip resources within a single package. SSI technology leverages proven microbump technology combined with coarse pitch through-silicon vias (TSVs) on a passive (no transistors) 65nm silicon interposer to deliver high reliability interconnect without performance degradation on one FPGA device. This breakthrough technology provides the next level of advanced system integration for applications that require high logic density and tremendous computational performance.