Virtex UltraScale


Break-Out Performance and Capacity

Virtex® UltraScale™ devices provide unprecedented levels of performance, system integration and bandwidth and are ideal for a wide range of applications such as 400+ Gb/s systems, large-scale emulation and high performance computing. These devices deliver a step-function in increased bandwidth and reduced latency for systems demanding massive data flow and packet processing. Based on the ASIC-class advantage of the UltraScale architecture, Virtex UltraScale devices are co-optimized with the Vivado® Design Suite and leverage the UltraFAST™ design methodology to accelerate time to market.

The family includes a roadmap to 16nm FinFET and incorporates:

  • ASIC-like clocking for scalability, performance and lower dynamic power
  • Next-generation routing  for rapid timing closure and industry-leading performance
  • Enhanced logic infrastructure for maximum performance and device utilization


Value Deliverables
Programmable System Integration
Increased System Performance
  • Up to two speed-grade improvement with high utilization
  • 33G transceivers for chip-to-chip, chip-to-optics, 28G backplanes
  • 16G backplane capable transceivers at half the power
  • 2,400 Mb/s DDR4 for robust operation over varying PVT
BOM Cost Reduction
  • Up to 50% lower cost – half the cost per port for Nx100G systems
  • VCXO  and fractional PLL integration reduces clocking component cost
  • 2,400 Mb/s DDR4 in a mid-speed grade
Total Power Reduction
  • Up to 45% lower power vs. previous generation
  • Fine granular clock gating with ASIC-like clocking
  • Enhanced logic cell packing reduces dynamic power
Accelerated Design Productivity
  • Footprint compatibility with Kintex UltraScale devices for scalability
  • Seamless footprint migration from 20nm planar to 16nm FinFET
  • Co-optimized with Vivado Design Suite for rapid design closure

Device Resources

  XCVU065 XCVU080 XCVU095 XCVU125 XCVU160 XCVU190 XCVU440
Logic Cells 626,640 780,000 940,800 1,253,280 1,621,200 1,879,920 4,407,480
Block RAM (Mb)
44.3 50.0 60.8 88.6 115.2 132.9 88.6
DSP Slices 600 672 768 1,200 1,560 1,800 2,880
PCI Express® Blocks 2 4 4 4 4 6 6
Interlaken 3 6 6 6 9 9 0
100G Ethernet 3 4 4 6 7 9 3
GTH 16 Gb/s Transceivers 20 32 32 40 52 60 48
GTY 32.75 Gb/s Transceivers 20
I/O Pins 520 832 832 1,040 1,040 1,040 1,456
I/O Voltage

1.0 – 3.3V

1.0 – 3.3V

1.0 – 3.3V

1.0 – 3.3V

1.0 – 3.3V

1.0 – 3.3V

1.0 – 3.3V

Please refer to the device data sheets for the latest product information.

Virtex UltraScale 16nm FinFET

In addition to Kintex® UltraScale and Virtex UltraScale devices built on TSMC’s 20nm SoC process technology, Xilinx will also be offering Virtex UltraScale All Programmable devices built on TSMC’s 16nm FinFET process technology to deliver aggressive power savings and performance improvements. Leveraging 2nd generation stacked silicon interconnect (SSI) technology, Xilinx will also be introducing next generation heterogeneous 3D IC products, targeting the next generation of 1 Tb/s high bandwidth and similar applications. As 16nm devices also leverage the UltraScale architecture, designers will not only see easy design migration but also broad footprint migration options from both Kintex and Virtex 20nm devices. Leveraging the FinFAST program with TSMC for fastest time-to-market, Xilinx will be delivering first product in 2014.

Key Documents

Featured Videos

400G Sumitomo
(3:59 min)

UltraScale Blog