Driving the next wave of data center deployment, transceiver technology plays a critical role in communicating with the networking infrastructure.
In this webinar, we use two example designs from the Vitis software platform tutorial on GitHub to illustrate the Vitis development flow with GT transceivers on the Alveo™ Data Center accelerator cards.

The Vitis target platform defines the base hardware and software architecture as well as the application context for AMD Xilinx platforms. The layer separation methodology enables applications and kernel portability and platform reusability.

In this webinar, we introduce the benefits of platforms and illustrate how to simplify platform creation with Versal ACAP extensible designs, common images, and the ‘createdts’ command. 

The Vitis software platform includes an extensive set of open-source, performance-optimized libraries that offer out-of-the-box acceleration with minimal changes to your existing applications. Vitis accelerated libraries are scalable across all AMD Xilinx platforms used in commonly-used programming languages, such as C and C++. 

This webinar explains how to design an application with the Vitis Graph library and demonstrates single-source, shortest-path application development on Alveo U50 Data Center accelerator cards.

Vitis Model Composer is a model-based design tool that enables rapid design exploration within the MathWorks MATLAB® and Simulink® environment and accelerates the path to production on AMD Xilinx devices via automatic code generation.

In this webinar, we use one example on GitHub to illustrate how to develop AI Engine kernels with the DSP library using Vitis Model Composer.