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Alveo U50 Data Center Accelerator Card

Overview

Product Description

The Xilinx® Alveo™ U50 Data Center accelerator cards provide optimized acceleration for workloads in financial computing, machine learning, computational storage, and data search and analytics. Built on Xilinx UltraScale+ architecture and packaged up in an efficient 75-watt, small form factor, and armed with 100 Gbps networking I/O, PCIe Gen4, and HBM, Alveo U50 is designed for deployment in any server.

Alveo accelerator cards are adaptable to changing acceleration requirements and algorithm standards, capable of accelerating any workload without changing hardware, and reduce overall cost of ownership.

Enabling Alveo accelerator cards is an ecosystem of Xilinx and partner applications for common Data Center workloads. For custom solutions, Xilinx’s Application Developer Tool Suite (Vitis™ environment) and Machine Learning Suite provide the frameworks for developers to bring differentiated applications to market.

The Alveo Programmable Cable is required for development access on Alveo U50 cards. The cable provides micro-USB support from a host PC to the Alveo U50 maintenance connector.

Alveo Accessories

Key Features & Benefits

Built for Performance & Efficiency

  • Faster application performance with 8GB HBM memory and PCIe Gen4 interconnect
  • Low latency network capability through 100G networking with support for 4x 10GbE, 4x 25GbE, or 1x 40GbE or 1x 100GbE

Adaptable – Accelerate Any Workload

  • Accelerates compute, network, storage workloads
  • Maximized application performance as workloads  and algorithms evolve through reconfigurable fabric - unlike fixed-architecture alternatives

Accessible - Cloud <-> On-Premises Mobility

  • Built for scale out architectures for deployment solutions on the cloud or on-premises interchangeably
Specifications

Card Specifications 

For full product specifications refer to the Data sheet.

Board Specifications Alveo U50 Accelerator Cards
A-U50DD
(ES)
A-U50
(Production)
Compute Resources
Look-up Tables (LUTs) 872K 872K
Registers 1,743K 1,743K
DSP Slices 5,952 5,952
Dimensions
Height ½ Height ½ Height
Length ½ Length ½ Length
Width Single Slot Single Slot
Memory
HBM Memory Capacity 8 GB 8 GB
HBM Total Bandwidth 316 GB/s * 316 GB/s *
Internal SRAM Capacity 28 MB 28 MB
Internal SRAM Total Bandwidth 24 TB/s 24 TB/s
Interfaces
PCI Express Gen3x 16, 2 x Gen4x 8, CCIX Gen3x 16, 2 x Gen4x 8, CCIX
Network Interfaces 2x SFP-DD (50GbE) 1x QSFP28 (100GbE)
Time Stamp
Clock Precision IEEE 1588 IEEE 1588
Power and Thermal
Maximum Total Power 75W 75W
Thermal Cooling Passive Passive
Tool Support
SDAccel Developer Environment Yes Yes
Vivado Design Suite Yes Yes

*For A-U50DD-P00G-ES3-G and A-U50-P00G-PQ-G measured 316 GB/s peak HBM2 bandwidth, 201 GB/s nominal.

Solutions

We’ve developed an ecosystem of Xilinx and partner solutions for most common workloads. Alveo Data Center accelerator cards can deliver dramatic acceleration across a broad set of applications and are reconfigurable to provide an ideal fit for the changing workloads of the modern data center. Compare how Alveo Data Center accelerator cards perform compared to traditional CPU architectures.

Documentation
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Getting Started

Download and Getting Started


  • Card installation procedures
  • Xilinx run-time and target platform installation
  • Bring up and validation
  • Designing with Vitis in C/C++ and OpenCL
  • Designing with Vivado using RTL, and HLx flow

Alveo U50 Package File Downloads

The preferred optimal design flow for targeting the Alveo Data Center accelerator card uses the Vitis™ software platform. Steps to deploy and develop using Vitis are given below. Long-time FPGA designers might want to use traditional design flows, such as RTL or HLx. This flow does not require installing the Vitis platform.

Vitis Design Flow

Set Up the Alveo U50 for Deploying Applications On-Premises

Follow steps 1 and 2 for deploying or developing applications on the U50 accelerator card.

1.

Download the Xilinx Runtime

The Xilinx runtime (XRT) is a low level communication layer (APIs and drivers) between the host and the card.

IMPORTANT: Please enter the following command before installing the XRT: 

RedHat:

sudo yum-config-manager --enable rhel-7-server-optional-rpms

sudo yum install -y https://dl.fedoraproject.org/pub/epel/epel-release-latest-7.noarch.rpm

CentOS:

sudo yum install epel-release

2.

Download the Deployment Target Platform

The deployment target platform is the communication layer physically implemented and flashed into the card.


Develop Your Own U50 Accelerated Applications

In addition to steps 1 and 2, also follow steps 3 and 4 for development on the U50 using the Vitis design flow.

3.

Download the Development Target Platform

The target platform interface for development is required if you are building your own applications.

4.

Download the Vitis Design Environment

The Xilinx Vitis software platform provides a framework for developing accelerated applications.


To access prior versions of the package files, visit the Package File Archives Page.

Vivado Design Flow

 

 

 

 

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