UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Xilinx Kintex-7 FPGA KC705 Evaluation Kit

Product Description

The Kintex®-7 FPGA KC705 Evaluation Kit includes all the basic components of hardware, design tools, IP, and pre-verified reference designs including a targeted design enabling high-performance serial connectivity and advanced memory interfacing. The included pre-verified reference designs and industry-standard FPGA Mezzanine Connectors (FMC) allow scaling and customization with daughter cards.

Key Features & Benefits

  • Optimized for quickly prototyping high performance serial transceiver applications using Kintex-7 FPGAs
  • Hardware, design tools, IP, and pre-verified reference designs
    • Demonstrates an end to end PCIe configured with 4 lanes at a 5 Gb/s link rate (Gen2) or 8 lanes at a 2.5 Gb/s link rate (Gen1)
  • Advanced memory interface with 1GB DDR3 SODIM Memory
  • Enabling serial connectivity with PCIe Gen2x4, SFP+ and SMA Pairs, UART, IIC
  • Supports embedded processing with MicroBlaze, soft 32bit RISC
  • Develop networking applications with 10-100-1000 Mbps Ethernet (GMII, RGMII and SGMII​)
  • Implement Video display applications with HDMI out
  • Expand I/O with the FPGA Mezzanine Card (FMC) interface

What's Included

  • KC705 evaluation board featuring the XC7K325T-2FFG900C FPGA
  • Full seat Vivado® Design Suite: Design Edition
    • Node locked & Device-locked to the Kintex-7 XC7K325T FPGA, with 1 year of updates and support
  • Northwest Logic PCI Express DMA Back-End IP (Evaluation License, 12 hour hardware timeout)
  • AMS 101 evaluation board
  • Targeted Reference Design: PCIe Gen2x4 with  a Northwest Logic DMA IP engine
  • Board Design Files (DxDesigner 2005,  Allegro 16.3 – 16.5)
  • Cables & Power Supply
  • 90-day limited warranty

Featured Documents

ek-k7-kc705-g-base-board

Key Features

FPGA: Kintex XC7K325T-2FFG900C

  • ROHS compliant KC705 kit including the XC7K325T-2FFG900C FPGA

Configuration

  • Onboard JTAG configuration circuitry to enable configuration over USB
  • JTAG header provided for use with Xilinx download cables such as the Platform Cable USB II
  • 128MB (1024Mb) Linear BPI Flash for PCIe® Configuration
  • 16MB (128Mb) Quad SPI Flash

Memory

  • 1GB DDR3 SODIMM 800MHz / 1600Mbps
  • 128MB (1024Mb) Linear BPI Flash for PCIe® Configuration
  • 16MB (128Mb) Quad SPI Flash
  • 8Kb IIC EEPROM
  • SD Card Slot

Communication & Networking

  • Gigabit Ethernet GMII, RGMII and SGMII
  • SFP / SFP+ cage
  • GTX port (TX, RX) with four SMA connectors
  • UART To USB Bridge
  • PCI Express x8 edge connector

Display

  • HDMI Video output
  • External Phy/codec device driving an HDMI Connector
  • 2x16 LCD display
  • 8x LEDs

Expansion Connectors

  • FMC-HPC (Partial Population) connector (4 GTX Transceiver, 116 single-ended or 58 differential (34 LA & 24 HA) user defined signals)
  • FMC-LPC connector (1 GTX Transceiver, 68 single-ended or 34 differential user defined signals)
  • Vadj can support 1.8V, 2.5V, or 3.3V
  • IIC

 

Clocking

  • Fixed Oscillator with differential 200MHz output
    • Used as the “system” clock for the FPGA
  • Programmable Oscillator with 156.250 MHz as the default output
    • Default frequency targeted for Ethernet applications but oscillator is programmable for many end uses
  • Differential SMA clock input
  • Differential SMA GTX reference clock input
  • Jitter attenuated clock
    • Used to support CPRI/OBSAI applications that perform clock recovery from a user-supplied SFP/SFP+ module

Control & I/O

  • 5X Push Buttons
  • 4X DIP Switches
  • Diff Pair I/O (1 SMA pair)
  • AMS FAN Header (2 I/O)
  • 7 I/O pins available through LCD header

Power

  • 12V wall adapter or ATX
  • Voltage and Current measurement capability of 2.5V, 1.5V, and 1.2V, 1.0V supplies (IIC path to FPGA)

Analog

  • XADC header

Highlighted Partner Bill of Materials (BOM)

Provider Name
Product Category Item
Analog Devices Inc Component ADV7511 HDMI transmitter
SiTime Component
Xilinx Power Management design examples Power management vendor products and tools
ams-101-evaluation-card

Key Features

Download the AMS Evaluator and your design files at the Xilinx support site.

  • Analog evaluation card connects to XADC header
  • Evaluates XADC 12-bit, 17-channel, 1Msps dual ADCs and Analog Mixed Signal technology
  • Pins and BNC mini grabbers allow for external analog input signals
  • On-board 16-bit dual DAC for analog test signals
    • Reference designs allow sine wave or DC test signals
  • AMS101 Evaluation card pairs with free AMS Evaluator tool for analyzing analog data, internal temperature and voltage measurements, and saving data to a .csv file

Included with this kit

Design Tools

Name Description License Type
Vivado Design Suite Design Edition The Xilinx Vivado® Design Suite is a revolutionary IP and System Centric design environment built from the ground up to accelerate the design for all programmable devices. Node locked & Device-locked to the Kintex-7 XC7K325T FPGA, with 1 year of updates

Intellectual Property

Name Description License Type
PCI Express DMA Engine (Northwest Logic) Northwest Logic’s PCI Express DMA Back-End Core Hardware Time Out Evaluation license for the Northwest Logic DMA implemented with and limited to an AXI DMA Back-End interface
>> See More
Memory Interface Generator (MIG) MIG is a free software tool used to generate memory controllers and interfaces for Xilinx FPGAs No-Charge IP

Additional Tools, IP and Resources

Provider Name Product Category Item Description
Red Hat Operating System Fedora v16.2 being used for 7-series TRDs
Open Source Software Tool TeraTerm One of many possible terminal emulators used for serial connection from your PC to the evaluation kit.