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Memory Interface Generator (MIG)

Product Description

Memory Interface Generator (MIG) is a free software tool used to generate memory controllers and interfaces for Xilinx® FPGAs. MIG generates unencrypted Verilog or VHDL design files, UCF constraints, simulation files and implementation script files to simplify the design process. Memory Interfaces supported are: DDR3 SDRAM, DDR2 SDRAM, QDRII SRAM, and DDRII SRAM, LP DDR, QDRII+ SRAM, and RLDRAM II.

Key Features & Benefits

  • MIG generates through a Graphic User Interface the unencrypted Verilog or VHDL design files, UCF constraints, and simulation script files to simplify the memory interface design process.
  • Memory modules (DIMM) are supported for DDR3, DDR2 and DDR SDRAMs.
  • OS Support
    • 64-bit/32-bit Linux Red hat Enterprise 4.0
    • 64-bit XP Professional
    • 32-bit Vista business
    • 64-bit SUSE 10
    • Windows XP

Product Vendor:

Xilinx
xilinx-131x43

Bundled With:

Vivado Design Suite
ISE Design Suite