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Wired & Wireless Testers

Enabling Next Generation Testers for Data Center, Wired and Wireless Next-Generation Networks

Overview

Data center testers require the highest serial I/O throughput and thermally efficient solution to implement PCS, FEC, and MAC. The Versal® Premium ACAP offers 112G PAM4 transceivers as well as massive networked hard IP including 600G channelized multirate Ethernet subsystem (DCMAC) with KP4/KR4 FEC, integrated 600G Interlaken with FEC, and 400G High-Speed Crypto (HSC) Engines to enable the fastest and most advanced test equipment.

Wireless testers require signal processing as well as a high I/O count for interfacing with data-converters, CPU, and memory. The Versal Premium series offers 24TOPs of signal processing capacity, 9Tb/s serial I/O bandwidth, and 136GB/s of external memory bandwidth to provide the high-performance compute density.

Design Examples Description Device Support

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Mobile Phone Tester

  • A mobile phone tester emulates a network and, as such, requires an adaptable platform with rich resources including AI Engines and DSP Engines, and memory to implement the baseband and digital front-end (DFE) functions of different cellular standards. Support for different parallel and serial I/Os is also needed to interface to DAC/ADC, processors, and memory banks.
  • Versal Premium series offers superior performance/watt to realize a high-performance mobile phone tester.
  • Built on the production-proven UltraScale™ architecture, Zynq® UltraScale+™ RFSoC offers resource and power-efficient solutions for LPDC and Turbo FEC.

Versal Premium ACAP

Zynq UltraScale+ RFSoC

 


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Ethernet Tester: Layer 1-3

  • The Versal Premium series with its 112G PAM4 transceivers providing 9Tb/s of serial bandwidth enables high bandwidth to optics, backplane, and chip-to-chip interconnect. It also has: 600G channelized multirate Ethernet subsystem (DCMAC), RS-FEC, and 400G High-Speed Crypto (HSC) Engines, saving more than 2.3M system logic cells. For a chip-to-chip interface, Versal Premium devices have hardened IPs for PCIe® Gen5 and 600G Interlaken, saving an additional 820K system logic cells along with power. Scalar Engines and Vivado® ML provide an ideal platform to build data-flow control, tracking, and reporting software.

Versal Premium ACAP

Documentation
Training & Support

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