UltraScale Architecture

Xilinx’s new 16nm and 20nm UltraScale™ families are based on the first architecture to span multiple nodes from planar through FinFET technologies and beyond, while also scaling from monolithic through 3D ICs. At 20nm Xilinx pioneered the first ASIC-class  architecture to enable multi-hundred gigabit-per-second levels of system performance with smart processing at full line rates, scaling to terabits and teraflops. At 16nm, UltraScale+ families combine new memory, 3D-on-3D, and multi-processing SoC (MPSoC) technologies to deliver a generation ahead of value.

The new Xilinx UltraScale+ FPGA portfolio is comprised of the Kintex^® UltraScale+ FPGA and Virtex^® UltraScale+ FPGA and 3D IC families, while the Zynq^® UltraScale+ family includes the industry’s first MPSoCs. Optimized at the system level, UltraScale+ devices deliver value far beyond a traditional process node migration – providing 2–5X greater system-level performance/watt over 28nm devices, far more systems integration and intelligence, and the highest level of security and safety.

• Next generation routing, ASIC-like clocking, and enhanced logic blocks for a target of 90% utilization
• High-speed memory cascading to remove bottlenecks in DSP and packet processing
• Enhanced DSP slices incorporating 27x18-bit multipliers and dual adders that enable a massive jump in fixed- and IEEE Std 754 floating-point arithmetic performance and efficiency
• Step-function increase in 3D IC inter-die bandwidth for virtual monolithic design
• Massive I/O bandwidth and dramatic latency reduction through multiple integrated ASIC-class blocks for 100G Ethernet with RS-FEC, 150G Interlaken, and PCIe^® Gen4
• Static- and dynamic-power gating across a wide range of functional elements yielding significant power savings
• Next-generation security with advanced approaches to AES bitstream decryption and authentication, key-obfuscation, and secure device programming
• DDR4 support of up to 2,666 Mb/s for massive memory interface bandwidth
• UltraRAM provides massive on-chip memory for SRAM device integration
• Innovative IP interconnect optimization technology for an additional 20-30% advantage in performance/watt
• MPSoC technology, combining soft and hard engines for real time control, graphics and video processing, waveform and packet processing, and multi-level security, safety and reliability, and more