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System Design on Zynq using SDSoC

Course Description This course provides professors an hands-on experience of creating application-specific systems on chip from C/C++ programs using the SDSoC development environment.
Level Introductory
Duration 2 Days
Who should attend? Professors who are familiar with Xilinx technology and wish to explore hardware/software co-design design space with SDSoC.
Pre-requisites
  • Basic C programming experience
  • Basic understanding of processor-based system

Skills Gained

After completing this workshop, you will be able to:

  • Introduce the concept of “software-defined” systems on chip (SDSoC)
  • Understand the capabilities and limitations of the SDSoC development environment
  • Get hands-on experience creating application-specific systems on chip from C/C++ programs using the SDSoC
  • Gain practical understanding of the SDSoC design flow
    • How the SDSoC compiler maps programs to HW/SW systems
      • Structure of generated hardware systems
      • Structure of the generated software
    • How to control the compilation and generation process
      • Modifying program source
      • Using #pragmas

Course Overview

Day 1:

  • Zynq SoC architecture and Vivado IPI
  • SDSoC tool overview
  • Lab 1: Getting started with SDSoC design flow
    • Go through the process of using SDSoC to create a new project using available templates.
  • Data motion networks
  • Lab 2: Pragmas and data motion networks
    • Handling data movements between the software and hardware accelerators using various pragmas and SDSoC API.
  • Coding Considerations
  • Profiling
  • Lab 3: Profiling application and create accelerators
    • Profiling an application, analyzing the results, identifying function(s) for hardware implementation.

Day 2:

  • Estimation
  • Lab 4: Estimating accelerator performance
    • Estimating the expected performance of an application when functions are targeted in hardware, without going through the entire build cycle.
  • Debugging
  • Lab 5: Debugging software application
    • Debugging software application targeting Standalone and Linux OS in SDSoC.
  • Using C-callable libraries and multiple accelerators
  • Improving performance with Vivado HLS
  • Lab 6: Fine-tuning with Vivado HLS
    • Using various techniques and directives of Vivado HLS which can be used in SDSoC to improve design performance. 
  • Creating SDSoC platform
  • Lab 6: Creating and using platform for a custom application
    • Creating a custom platform for a matrix multiply application (2018x version)
    • Creating a custom platform for an audio application (2017x and prior versions)

Common to PYNQ-Z1 and PYNQ-Z2

Common Files

ZedBoard

ZYBO

Common Files

ZedBoard

ZYBO